High voltage charge pump using standard CMOS technology

Conference Proceedings - 2nd Annual IEEE Northeast Workshop on Circuits and Systems, NEWCAS 2004

Volumn , Issue , 2004, Pages 317-320

  Richard, Jean François ^a   Savaria, Yvon ^b  

^a DALSA Semiconductor Inc   (Canada)

^b ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; FREQUENCIES; LEAKAGE CURRENTS; MICROELECTROMECHANICAL DEVICES; SEMICONDUCTOR JUNCTIONS; VOLTAGE DISTRIBUTION MEASUREMENT;

GATE OXIDES; HIGH VOLTAGE CHARGE PUMPS; MULTI-PHASE VOLTAGE DOUBLER (MPVD); TELECOM INTERFACES; VOLTAGE GENERATION;

DIGITAL CIRCUITS;

EID: 14844333288     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. th, 2002
2. R. Pelliconi, D. Iezzi, A. Baroni, M. Pasotti, P. Rolandi, "Power efficient Charge Pump in Deep Submicron Standard CMOS Technology", année
3. H. Lin, J. Lu, Y. Lin, "A new 4-phase charge pump without body effects for low supply voltages".
4. J. Shin, I. Chung, Y. Park, H. Min, "A new Charge Pump Without Degradation in Threshold Voltage Due to Body Effect", IEEE J. Solid-State Circuits, vol.35, no.8, pp. 1227-1230, August 2000.
5. J. Starzyk, Y. Jan, F. Qiu, "A DC-DC Charge Pump Design Based on Voltage Doublers", IEEE transactions on circuits and systems I, vol.48, no.3, pp.350-359, march 2001.
6. K. choi, J. Park, J. Kim, T. Jung, K. Suh, "Floating Well Charge Pump circuits for Sub-2.0V Single Supply Flash Memories ", Symposium on VLSI Circuits Digest of Technical Papers, Ref:4-930813-76-X, 1997.
7. F.Pulvirenti, U.S. Patent 5874850, Feb.23, 1999.
8. th, 2000.