Advanced 3-D stacked technology

Proceedings of 5th Electronics Packaging Technology Conference, EPTC 2003

Volumn , Issue , 2003, Pages 13-18

  Fillion, R ^a   Wojnarowski, R ^a   Kapusta, C ^a   Saia, R ^a   Kwiatkowski, K ^b   Lyke, J ^c  

^a GE GLOBAL RESEARCH   (United States)

^b LOS ALAMOS NATIONAL LABORATORY   (United States)

^c AIR FORCE RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; FOCUSING; INTEGRATED CIRCUIT INTERCONNECTS; PIXELS; SIGNAL PROCESSING; THREE DIMENSIONAL INTEGRATED CIRCUITS;

3D STACKING TECHNOLOGY; ASSEMBLY TECHNOLOGY; ELECTRICAL SIGNAL; FOCAL PLANE ARRAY DETECTOR; HIGH FRAME RATE; HYBRID ASSEMBLY; INNOVATIVE APPROACHES; MINIMIZING THE NUMBER OF;

IMAGE PROCESSING;

EID: 14844316094     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2003.1271482     Document Type: Conference Paper

References (6)

1. "Radiation Detection and Measurement", Glenn F. Knoll, New York, Wiley, 2000
2. Lyke, J, "Compact 3-D Framework for Miniature Packaging", GOMAC 2001 Digest of Papers, March 2001 San Antonio, TX.
3. Crowley, R., "Three-Dimensional Electronics Packaging: A multi-client study," TechSearch International, Nov 1993.
4. Forman, G.A., et.al "GE 3-D HDI Stacked Multichip Module Technology's Impact on System Design",. NEPCON West, Anaheim, CA, Feb. 7-11, 1993.
5. Wojnarowski, R.J., et al., "Three Dimensional Hybrid Wafer Scale Integration Using GE High Density Interconnect Technology", IEEE International Conference on Wafer-Scale Integration, San Francisco, CA, Jan. 20, 1993.
6. Fillion, R.A., et.al., "Flex Interconnection Using the Chip-on-Flex Technology," Proceedings of Microelectronic Packaging Conference, Atlanta, Dec. 9-11, 1996