FPGA-efficient phase-to-I/Q architecture

Proceedings - IEEE International SOC Conference

Volumn , Issue , 2004, Pages 373-376

  Janiszewski, Ireneusz ^a   Meuth, Hermann ^a   Hoppe, Bernhard ^a  

^a DARMSTADT UNIVERSITY OF APPLIED SCIENCES   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE PORTABILITY; COMPUTER SOFTWARE REUSABILITY; ELECTRIC TRANSFORMERS; FLIP FLOP CIRCUITS; ITERATIVE METHODS; MATHEMATICAL MODELS; RANDOM ACCESS STORAGE; ROM; VECTORS;

CO-ORDINATE ROTATION DIFITAL COMPUTER (CORDIC) ALGORITHM; LOOK-UP TABLE (LUT); PHASE SEQUENCES; XILINX (CO);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 14844314434     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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