Performance of 1 and 10 Gigabit Ethernet cards with server quality motherboards

Future Generation Computer Systems

Volumn 21, Issue 4, 2005, Pages 469-488

  Hughes Jones, Richard ^a   Clarke, Peter ^b   Dallison, Steven ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

^b UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

Gigabit Ethernet; Gigabit networking; Network Interface card; PCI bus; PCI X bus; UDP

Indexed keywords

COMPUTER OPERATING SYSTEMS; DATA TRANSFER; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; NETWORK PROTOCOLS; PRINTED CIRCUIT BOARDS; SERVERS; TELECOMMUNICATION LINKS;

GIGABIT ETHERNET; GIGABIT NETWORKING; NETWORK INTERFACE CARDS (NIC); PCI BUS; PCI-X BUS; UDP;

TELECOMMUNICATION NETWORKS;

EID: 14544286304     PISSN: 0167739X     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.future.2004.10.002     Document Type: Article

References (29)

1. Intel, PRO/10GbE LR Server Adapter User Guide, http://support.intel.com/ support/network/adapter/pro10gbe/pro10gbelr/sb/CS-008392.htm.
2. S2io, S2io Xframe 10 Gigabit Ethernet PCI-X Server/Storage Adapter DataSheet, http://www.s2io.com/products/XframeDatasheet.pdf.
3. SuperMicro motherboard reference material, http://www.supermicro.com/ PRODUCT/MotherBoards/E7500/P4DP6.htm.
4. DataTAG, http://datatag.web.cern.ch/datatag.
5. Intel, hyper-threading technology on the Intel Xeon Processor Family for Servers, White paper, http://www.intel.com/eBusiness/pdf/prod/server/xeon/ wp020901.pdf.
6. M. Boosten, R.W. Dobinson, and P. van der Stok MESH messaging and scheduling for fine grain parallel processing on commodity platforms Proceedings of the International Conference on Parallel and Distributed Techniques and Applications (PDPTA'99) Las Vegas, Nevada June 1999
7. B. Lowekamp, B. Tierney, L. Cottrell, R. Hughes-Jones, T. Kielmann, M. Swany, A hierarchy of network performance characteristics for Grid applications and services, GGF Network Measurements Working Group, GGF Recommendation GFD.23, May 2004, http://www.ggf.org/documents/GWD-R/GFD-R.023.pdf.
8. ATLAS HLT/DAQ/DCS Group, ATLAS High-Level Trigger Data Acquisition and Controls, Technical Design Report CERN/LHCC/2003-022, Reference ATLAS TDR 016, June 2003.
9. P. Gray, and A. Bets Performance evaluation of copper-based Gigabit Ethernet Interfaces Proceedings of the 27th Annual IEEE Conference on Local Computer Networks (LCN'02) Tampa, FL November 2002
10. R. Hughes-Jones and F. Saka, Investigation of the performance of 100 Mbit and Gigabit Ethernet components using raw Ethernet frames, Technical Report ATL-COM-DAQ-2000-014, March 2000, http://www.hep.man.ac.uk/∼rich/atlas/ atlas_net_note_draft5.pdf.
11. R. Hughes-Jones, UDPmon: a Tool for Investigating Network Performance, http://www.hep.man.ac.uk/∼rich/net.
12. Details of the Gigabit Ethernet Probe card, http://www.hep.man.ac.uk/ ∼scott/projects/atlas/probe/probehome.html.
13. PCI Special Interest Group, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a, July 2000.
14. SLAC Network tests on bulk throughput site: http://www-iepm.slac. stanford.edu/monitoring/bulk/SC2001 high throughput measurements: http://www-iepm.slac.stanford.edu/monitoring/bulk/sc2001.
15. R. Hughes-Jones, S. Dallison, G. Fairey, P. Clarke, and I. Bridge Performance measurements on Gigabit Ethernet NICs and server quality motherboards Proceedings of the 1st International Workshop on Protocols for Fast Long-Distance Networks (PFLDnet 2003) Geneva, Switzerland February 2003
16. W.C. Feng, J. Hurwitz, and H. Newman Optimizing 10-Gigabit Ethernet for networks of workstations, clusters, and grids: a case study Proceedings of the 15th International Conference for High Performance Networking and Communications (SC 2003) Phoenix, AZ November 2003
17. J. Hurwitz, and W. Feng Initial end-to-end performance evaluation of 10-Gigabit Ethernet Proceedings of the 11th Symposium on High Performance Interconnects (HOT-I 2003) Stanford, California August 2003
18. J.C. Mogul, and K.K. Ramakrishnan Eliminating receive livelock in an interrupt-driven kernel Proceedings of the 1996 Usenix Technical Conference 1996 99 111
19. Intel, IA-32 Intel Architecture Software Developer's Manual, vol. 1, Basic Architecture, http://www.intel.com/design/pentium4/manuals/245471.htm.
20. F. Saka, Ethernet for the ATLAS Second Level Trigger, Chapter 6 Thesis, Physics Department, Royal Holloway College, University of London, 2001, http://www.hep.ucl.ac.uk/∼fs/thesis.pdf.
21. R. McCool, Fibre Developments at Jodrell Bank Observatory, in Proceedings of the 2nd Annual e-VLBI (Very Large Base Interferometry) Workshop, Dwingeloo, The Netherlands, May 2003, http://www.jive.nl/evlbi_ws/presentations/mccool.pdf.
22. Variations in 10 Gigabit Ethernet Laser Transmitter Testing Using Reference Receivers, Tektronix Application Note, 2003, http://www.tek.com/ Measurement/App_Notes/2G_16691/eng/2GW_16691_0.pdf.
23. C. Meirosu, The International Grid Testbed: a 10 Gigabit Ethernet success story, Talk given at the 1st International Grid Networking Workshop (GNEW 2004), Geneva, Switzerland, March 2004, http://datatag.web.cern.ch/datatag/ gnew2004/slides/meirosu.ppt.
24. P. Shivam, P. Wyckoff, and D. Panda EMP: zero-copy OS-bypass NIC-driven Gigabit Ethernet message passing Proceedings of the 13th International Conference for High Performance Networking and Communications (SC2001) Denver, CO November 2001
25. M.L. Loeb, A.J. Rindos, W.G. Holland, and S.P. Woolet Gigabit Ethernet PCI adapter performance IEEE Netw. 15 2 2001 42 47
26. R. Kovac, Getting 'Giggy' with it, Network World Fusion, June 2001, http://www.nwfusion.com/reviews/2001/0618rev.html.
27. T. Shanley PCI-X System Architecture 2001 Addison-Wesley
28. altAIMD kernel, http://www.hep.ucl.ac.uk/∼ytl/tcpip/linux/altaimd/.
29. Web100 Project home page, http://www.web100.org/.