Refined Single Trunk Tree: A Rectilinear Steiner Tree Generator for Interconnect Prediction

International Workshop on System Level Interconnect Prediction

Volumn , Issue , 2002, Pages 85-89

  Chen, Hongyu ^a   Qiao, Changge ^b   Zhou, Feng ^a   Cheng, Chung Kuan ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b SYNOPSYS INC   (United States)

Author keywords

Rectilinear Steiner Tree Algorithm; Refined Single Trunk Tree; Routing Estimation; VLSI CAD

Indexed keywords

RECTILINEAR STEINER TREE ALGORITHM; REFINED SINGLE TRUNK TREE; ROUTING ESTIMATION; VLSI CAD;

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED DESIGN; ELECTRIC NETWORK TOPOLOGY; HEURISTIC METHODS; INTEGRATED CIRCUIT LAYOUT; PROBLEM SOLVING; VLSI CIRCUITS;

INTERFACES (COMPUTER);

EID: 1442284481     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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