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Volumn , Issue , 2004, Pages 363-370
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Mixed synchronous/asynchronous state memory for low power FSM design
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Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
COMPUTER ARCHITECTURE;
ENERGY MANAGEMENT;
FLIP FLOP CIRCUITS;
LOGIC GATES;
OPTIMIZATION;
PROBLEM SOLVING;
SWITCHING;
ASYNCHRONOUS STATE MEMORY;
FINITE STATE MACHINES (FSM);
LOCAL STATE MEMORY (LSM);
POWER OPTIMIZATION;
ENERGY UTILIZATION;
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EID: 13944256596
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/dsd.2004.1333298 Document Type: Conference Paper |
Times cited : (17)
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References (10)
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