A novel architecture of arithmetic coder in JPEG2000 based on parallel symbol encoding

International Conference on Parallel Computing in Electrical Engineering: Workshop on System Design Automation, SDA, PARELEC 2004

Volumn , Issue , 2004, Pages 303-308

  Pastuszak, Grzegorz ^a  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; FREQUENCIES; IMAGE CODING; PARALLEL PROCESSING SYSTEMS; THROUGHPUT;

ARCHITECTURE DESIGN; CONTEXT ADAPTIVE BINARY ARITHMETIC CODER (CABAC); EMBEDDED BLOCK CODING WITH OPTIMIZED TRUNCATION (EBCOT); PERFORMANCE ANALYSIS;

IMAGE COMPRESSION;

EID: 13944255409     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. JPEG 2000 Part I Final Committee Draft Version 1.0, ISO/IEC JTC1/SC29/WG1 N1636R, Mar. 2000.
2. D. S. Taubman and M. W. Marcellin, JPEG2000: Image Compression Fundamentals, Standard and Practice. Norwell, MA: Kluwer, 2002.
3. Yun-Tai Hsiao, Hung-Der Lin, Kun-Bin Lee and Chein-Wei Jen, "High Speed Memory Saving Architecture for the Embedded Block Coding in JPEG 2000," 2002.
4. K. Andra, C. Chakrabarti, and T. Acharya, "A high performance JPEG2000 architecture," IEEE Trans. Circuits and Systems for Video Technology, vol. 13, no. 3, pp. 209-218, March 2003.
5. C.-J. Lian, K.-F. Chen, H.-H. Chen, and L.-G. Chen, "Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000," IEEE Trans. Circuits and Systems for Video Technology, vol. 13, no. 3, pp. 219-230, March 2003.
6. Yijun Li; Aly R.E, Wilso B and Bayoumi M.A, Analysis and Enhancement for EBCOT in high speed JPEG 2000 Architectures," The 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002, Volume: 2, 2002
7. Hung-Chi Fang, Tu-Chih Wang, Chung-Jr Lian, Te-Hao Chang and Liang-Gee Chen, "High Speed Memory Efficient EBCOT Architecture for JPEG2000".