The Flash memory read path: Building blocks and critical aspects

Proceedings of the IEEE

Volumn 91, Issue 4, 2003, Pages 537-553

  Micheloni, Rino ^a,b   Crippa, Luca ^b   Sangalli, Miriam ^b   Campardo, Giovanni ^a,b  

^a IEEE   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

Address transition detection (ATD); Boost; Decoders; Equalization; Multilevel read; Output buffer; Read path; Sense amplifier

Indexed keywords

BUFFER AMPLIFIERS; COMPUTER SCIENCE; DATA STORAGE EQUIPMENT; DECODING; ENERGY UTILIZATION; RANDOM ACCESS STORAGE; ROM;

ADDRESS TRANSITION DETECTION (ATD); BOOST; DECODERS; EQUALIZATION; MULTILEVEL READ; OUTPUT BUFFER; READ PATH; SENSE AMPLIFIER;

FLASH MEMORY;

EID: 13444275716     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2003.811704     Document Type: Review

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