MOSFET linearity performance degradation subject to drain and gate voltage stress

IEEE Transactions on Device and Materials Reliability

Volumn 4, Issue 4, 2004, Pages 681-689

  Yu, Chuanzhao ^a   Yuan, J S ^a   Yang, Hong ^a  

^a UNIVERSITY OF CENTRAL FLORIDA   (United States)

Author keywords

Complementary metal oxide semiconductor (CMOS) mixers; Gate oxide breakdown (BD); Gilbert cell; Hot carriers (HCs); Linearity; Voltage stress; Volterra series

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); HOT CARRIERS; MATHEMATICAL MODELS; OXIDES; STRESSES; TRANSCONDUCTANCE;

COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) MIXERS; GATE OXIDE BREAKDOWN; GILBERT CELL; LINEARITY; VOLTAGE STRESS; VOLTERRA SERIES;

MOSFET DEVICES;

EID: 13444257633     PISSN: 15304388     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDMR.2004.838407     Document Type: Article

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