Memory efficient pipelined Viterbi decoder with look-ahead trace back

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 2001, Pages 769-772

  Baek, Jung Gi ^a   Yoon, Sang Hun ^a   Chong, Jong Wha ^a  

^a Hanyang University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BEST CHOICE; CODE RATES; CONSTRAINT LENGTHS; HARDWARE COMPLEXITY; HIGH THROUGHPUT; LOOK-AHEAD; MEMORY EFFICIENT; NOVEL ARCHITECTURE; PIPELINED ARCHITECTURE; PROPOSED ARCHITECTURES; VITERBI DECODER;

ARCHITECTURE; DECODING; TERBIUM ALLOYS;

VITERBI ALGORITHM;

EID: 1342298946     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. G.D Forney, Jr., "The Viterbi Algorithm, " Proceedings of the IEEE, vol. 61, pp. 268-278, March 1973.
2. O.Kato, M.Watanabe, etc, "Soft decision Viterbi decoding and self-interference cancellation for high radio communication by parallel combinatory CDMA", IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E80-A, no.7. pp.1233-1240, July 1997.
3. M.Watanable, O.Kato, etc, "High speed radio communication technology using parallel combinatory CDMA under multipath Rayleigh-fading interference environment", 1996 IEEE 46th Vehicular Technology Conference, vol. 1, pp.407-410, New York, USA; 1996.
4. L.Jia, Y.Gao, J.Isoaho and H.Tenhuman, "Design of a super-pipelined Viterbi decoder", Circuits and Systems ISCAS'99, May 1999.