Single electron memory devices utilizing Al 2O 3 tunnel oxide barriers

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 22, Issue 6, 2004, Pages 3119-3123

  Yadavalli, Kameshwar K ^a   Anderson, Nicolas R ^a   Orlova, Tatiana A ^a   Orlov, Alexei O ^a   Snider, Gregory L ^a   Elam, Jeffrey ^b  

^a University of Notre Dame   (United States)

^b ARGONNE NATIONAL LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC LAYER DEPOSITION (ALD); FLOATING GATES; SINGLE ELECTRON MEMORY DEVICES; TUNNEL BARRIERS;

ALUMINA; CAPACITORS; CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; DYNAMIC RANDOM ACCESS STORAGE; ELECTRODES; ELECTRON BEAM LITHOGRAPHY; ELECTRON TUNNELING; ELLIPSOMETRY; EVAPORATION; NANOSTRUCTURED MATERIALS; OXIDATION; PHOTOLITHOGRAPHY; POLYMETHYL METHACRYLATES; SILICON; THIN FILMS;

GATES (TRANSISTOR);

EID: 13244272394     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1821506     Document Type: Conference Paper

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