Hardware architecture for hierarchical segmentation in foveal images

International Journal of Imaging Systems and Technology

Volumn 14, Issue 4, 2004, Pages 153-166

  Coslado, F J ^a   Camacho, P ^a   Gonzalez M ^a   Sandoval, F ^a  

^a UNIVERSITY OF MÁLAGA   (Spain)

Author keywords

ASIC; FPGA; Linking; Multiresolution; Polygon

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BANDWIDTH; CAMERAS; DATA COMMUNICATION SYSTEMS; DATA STRUCTURES; DATABASE SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; INFORMATION RETRIEVAL; THREE DIMENSIONAL; TOPOLOGY; VISION;

FOVEAL SENSORS; LINKING; MULTIRESOLUTION; POLYGON;

IMAGE SEGMENTATION;

EID: 12344294453     PISSN: 08999457     EISSN: None     Source Type: Journal    
DOI: 10.1002/ima.20019     Document Type: Article

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