-
2
-
-
0002986475
-
The SimpleScalar tool set, version 2.0
-
ACM SIGARCH, June
-
D. Burger and T. M. Austin. The SimpleScalar tool set, version 2.0. In Computer Architecture News, volume 25(3), pages 13-25. ACM SIGARCH, June 1997.
-
(1997)
Computer Architecture News
, vol.25
, Issue.3
, pp. 13-25
-
-
Burger, D.1
Austin, T.M.2
-
3
-
-
84956862926
-
Instruction level parallelism for reconfigurable computing
-
Hartenstein and Keevallik, editors, Springer-Verlag, September
-
T. J. Callahan and J. Wawrzynek. Instruction level parallelism for reconfigurable computing. In Hartenstein and Keevallik, editors, FPL'98, Field-Programmable Logic and Applications, 8th International Workshop, Tallinin, Estonia, volume 1482 of Lecture Notes in Computer Science. Springer-Verlag, September 1998.
-
(1998)
FPL'98, Field-programmable Logic and Applications, 8th International Workshop, Tallinin, Estonia, Volume 1482 of Lecture Notes in Computer Science
-
-
Callahan, T.J.1
Wawrzynek, J.2
-
4
-
-
85013779657
-
Specifying and compiling applications for RaPiD
-
K. Pocek and J. Arnold, editors, Napa, CA, Apr, IEEE Computer Society, IEEE Computer Society Press
-
D. Cronquist, P. Franklin, S. Berg, and C. Ebeling. Specifying and compiling applications for RaPiD. In K. Pocek and J. Arnold, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 116-127, Napa, CA, Apr. 1998. IEEE Computer Society, IEEE Computer Society Press.
-
(1998)
Proceedings of IEEE Workshop on FPGAS for Custom Computing Machines
, pp. 116-127
-
-
Cronquist, D.1
Franklin, P.2
Berg, S.3
Ebeling, C.4
-
6
-
-
0034174025
-
The density advantage of configurable computing
-
Apr.
-
A. DeHon. The density advantage of configurable computing. Computer, 33(4):41-49, Apr. 2000.
-
(2000)
Computer
, vol.33
, Issue.4
, pp. 41-49
-
-
DeHon, A.1
-
7
-
-
0032674517
-
PipeRench: A coprocessor for streaming multimedia acceleration
-
S. C. Goldstein, H. Schmit, M. Moe, M. Budiu, S. Cadambi, R. R. Taylor, and R. Laufer. PipeRench: a coprocessor for streaming multimedia acceleration. In Published in proceedings of the 26th International Symposium on Computer Architecture ISCA 99, 1999.
-
(1999)
Published in Proceedings of the 26th International Symposium on Computer Architecture ISCA 99
-
-
Goldstein, S.C.1
Schmit, H.2
Moe, M.3
Budiu, M.4
Cadambi, S.5
Taylor, R.R.6
Laufer, R.7
-
8
-
-
0031376640
-
The Chimaera reconfigurable functional unit
-
S. Hauck, T. W. Fry, M. M. Hosler, and J. P. Kao. The Chimaera reconfigurable functional unit. In IEEE Symposium on FPGAs for Custom Computing Machines, pages 87-96, 1997.
-
(1997)
IEEE Symposium on FPGAS for Custom Computing Machines
, pp. 87-96
-
-
Hauck, S.1
Fry, T.W.2
Hosler, M.M.3
Kao, J.P.4
-
9
-
-
0031360911
-
GARP: A MIPS processor with a reconfigurable coprocessor
-
J. Arnold and K. L. Pocek, editors, Napa, CA, Apr
-
J. R. Hauser and J. Wawrzynek. GARP: A MIPS processor with a reconfigurable coprocessor. In J. Arnold and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 12-21, Napa, CA, Apr. 1997.
-
(1997)
Proceedings of IEEE Workshop on FPGAS for Custom Computing Machines
, pp. 12-21
-
-
Hauser, J.R.1
Wawrzynek, J.2
-
10
-
-
0031339427
-
MediaBench: A tool for evaluating and synthesizing multimedia and communications systems
-
C. Lee, M. Potkonjak, and W. H. Mangione-Smith. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems. In Micro-30, 30th annual ACM/IEEE international symposium on Microarchitecture, pages 330-335, 1997.
-
(1997)
Micro-30, 30th Annual ACM/IEEE International Symposium on Microarchitecture
, pp. 330-335
-
-
Lee, C.1
Potkonjak, M.2
Mangione-Smith, W.H.3
-
11
-
-
0033720597
-
Hardware-software co-design of embedded reconfigurable architectures
-
Y. Li, T. Callahan, E. Darnell, R. Harr, U. Kurkure, and J. Stockwood. Hardware-software co-design of embedded reconfigurable architectures. In DAC 2000, 2000.
-
(2000)
DAC 2000
-
-
Li, Y.1
Callahan, T.2
Darnell, E.3
Harr, R.4
Kurkure, U.5
Stockwood, J.6
-
12
-
-
0033688597
-
Smart memories: A modular reconfigurable architecture
-
June
-
K. Mai, T. Paaske, N. Jayasena, R. Ho, W. Dally, and M. Horowitz. Smart memories: A modular reconfigurable architecture. In Proceeding of the International Conference on Computer Architecture 2000, June 2000.
-
(2000)
Proceeding of the International Conference on Computer Architecture 2000
-
-
Mai, K.1
Paaske, T.2
Jayasena, N.3
Ho, R.4
Dally, W.5
Horowitz, M.6
-
15
-
-
84950155001
-
The NAPA adaptive processing architecture
-
April
-
C. Rupp, M. Landguth, T. Garverick, E. Gomersall, H. Holt, J. Arnold, and M. Gokhale. The NAPA adaptive processing architecture. In IEEE Symposium on FPGAs for Custom Computing Machines (FCCM'98,) April 1998.
-
(1998)
IEEE Symposium on FPGAS for Custom Computing Machines (FCCM'98,)
-
-
Rupp, C.1
Landguth, M.2
Garverick, T.3
Gomersall, E.4
Holt, H.5
Arnold, J.6
Gokhale, M.7
-
16
-
-
0008164846
-
MorphoSys: An integrated re-configurable architecture
-
Monterey, CA, April, April
-
H. Singh, M.-H. Lee, G. Lu, F. J. Kurdahi, N. Bagherzadeh, and T. Lang. MorphoSys: An integrated re-configurable architecture. In Proceedings of the NATO Symposium on System Concepts and Integration, Monterey, CA, April, April 1998.
-
(1998)
Proceedings of the NATO Symposium on System Concepts and Integration
-
-
Singh, H.1
Lee, M.-H.2
Lu, G.3
Kurdahi, F.J.4
Bagherzadeh, N.5
Lang, T.6
-
17
-
-
0022769348
-
A simulation study of decoupled architecture computers
-
August
-
J. E. Smith, S. Weiss, and N. Pang. A simulation study of decoupled architecture computers. In IEEE Computer, volume 35(8), pages 692-702, August 1986.
-
(1986)
IEEE Computer
, vol.35
, Issue.8
, pp. 692-702
-
-
Smith, J.E.1
Weiss, S.2
Pang, N.3
-
20
-
-
0026867086
-
Active Messages: A mechanism for integrated communication and computation
-
Gold Coast, Australia
-
T. von Eicken, D. E. Culler, S. C. Goldstein, and K. E. Schauser. Active Messages: A mechanism for integrated communication and computation. In 19th International Symposium on Computer Architecture, pages 256-266, Gold Coast, Australia, 1992.
-
(1992)
19th International Symposium on Computer Architecture
, pp. 256-266
-
-
Von Eicken, T.1
Culler, D.E.2
Goldstein, S.C.3
Schauser, K.E.4
-
21
-
-
0344258987
-
-
Technical Report, March
-
E. Waingold, M. Taylor, V. Sarkar, W. Lee, V. Lee, J. Kim, M. Frank, P. Finch, S. Devabhaktuni, R. Barua, J. Babb, S. Amarasinghe, and A. Agarwal. Baring it all to software: The Raw machine. Technical Report TR-709, MIT/LCS, March 1997.
-
(1997)
Baring It All to Software: The Raw Machine
-
-
Waingold, E.1
Taylor, M.2
Sarkar, V.3
Lee, W.4
Lee, V.5
Kim, J.6
Frank, M.7
Finch, P.8
Devabhaktuni, S.9
Barua, R.10
Babb, J.11
Amarasinghe, S.12
Agarwal, A.13
|