Exploiting global data locality in non-blocking multithreaded architectures

3rd International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 1997

Volumn , Issue , 1997, Pages 78-84

  Wen Yen Lin, ^a   Gaudiot, J L ^a  

^a University of Southern California ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MEMORY ARCHITECTURE; NETWORK ARCHITECTURE;

COMMUNICATION LATENCY; COMMUNICATION LATENCY REDUCTIONS; DISTRIBUTED MEMORY SYSTEMS; MULTITHREADED ARCHITECTURE; NETWORK TRAFFIC; RUN TIME SYSTEMS; SOFTWARE CACHES; SPECIFIC HARDWARE;

PARALLEL ARCHITECTURES;

EID: 11844298572     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPAN.1997.645058     Document Type: Conference Paper

References (13)

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