-
1
-
-
0029374075
-
Use of minimum-adder multiplier blocks in FIR digital filters
-
Sep.
-
A. G. Dempster and M. D. Macleod, "Use of minimum-adder multiplier blocks in FIR digital filters," IEEE Trans. Circuits Syst.-II, vol. 42, no. 9, pp. 569-577, Sep. 1995.
-
(1995)
IEEE Trans. Circuits Syst.-II
, vol.42
, Issue.9
, pp. 569-577
-
-
Dempster, A.G.1
Macleod, M.D.2
-
2
-
-
0032752016
-
A new algorithm for elimination of common subexpressions
-
Jan.
-
R. Pasko, P. Schaumont, V. Derudder, S. Vernalde, and D. Durackova, "A new algorithm for elimination of common subexpressions," IEEE Trans. Computer-Aided Design Integrated Circuits, vol. 18, no. 1, pp. 58-68, Jan. 1999.
-
(1999)
IEEE Trans. Computer-aided Design Integrated Circuits
, vol.18
, Issue.1
, pp. 58-68
-
-
Pasko, R.1
Schaumont, P.2
Derudder, V.3
Vernalde, S.4
Durackova, D.5
-
3
-
-
0016940547
-
Digital filtering by polyphase network: Application to sample rate alterations and filter banks
-
April
-
M. Bellanger, G. Bonnerot, and M. Coudreuse, "Digital filtering by polyphase network: application to sample rate alterations and filter banks," IEEE Trans. Acoust. Speech Signal Processing, vol. 24, pp. 109-114, April 1976.
-
(1976)
IEEE Trans. Acoust. Speech Signal Processing
, vol.24
, pp. 109-114
-
-
Bellanger, M.1
Bonnerot, G.2
Coudreuse, M.3
-
6
-
-
0033893307
-
Efficient interpolators and filter banks using multiplier blocks
-
Jan.
-
A. G. Dempster and N. P. Murphy, "Efficient interpolators and filter banks using multiplier blocks," IEEE Trans. Signal Processing, vol. 48, no. 1, pp. 257-261, Jan. 2000.
-
(2000)
IEEE Trans. Signal Processing
, vol.48
, Issue.1
, pp. 257-261
-
-
Dempster, A.G.1
Murphy, N.P.2
-
7
-
-
11844267513
-
Towards an algorithm for matrix multiplier blocks
-
Krakow, Poland, Sept. 1-4
-
A. G. Dempster, O. Gustafsson, and J. O. Coleman, "Towards an algorithm for matrix multiplier blocks," in Proc. European Conf. Circuit Theory-Design, Krakow, Poland, Sept. 1-4, 2003.
-
(2003)
Proc. European Conf. Circuit Theory-design
-
-
Dempster, A.G.1
Gustafsson, O.2
Coleman, J.O.3
-
8
-
-
11844268906
-
Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach
-
Espoo, Finland, June 9-11
-
O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach," in Proc. Nordic Signal Processing Symposium, Espoo, Finland, June 9-11, 2004.
-
(2004)
Proc. Nordic Signal Processing Symposium
-
-
Gustafsson, O.1
Ohlsson, H.2
Wanhammar, L.3
-
9
-
-
0030661454
-
Optimization and efficient implementation of FIR filters with adjustable fractional delay
-
Hong Kong, June 9-12
-
J. Vesma and T. Saramäki, "Optimization and efficient implementation of FIR filters with adjustable fractional delay," in Proc. IEEE Int. Symp. Circuits Syst., Hong Kong, June 9-12, 1997, vol. IV, pp. 2256-2259.
-
(1997)
Proc. IEEE Int. Symp. Circuits Syst.
, vol.4
, pp. 2256-2259
-
-
Vesma, J.1
Saramäki, T.2
-
10
-
-
0030147024
-
Design techniques for silicon compiler implementations of high-speed FIR digital filters
-
May
-
R. A. Hawley, B. C. Wong, T.-J. Lin, J. L. Laskowski, and H. Samueli, "Design techniques for silicon compiler implementations of high-speed FIR digital filters," IEEE J. Solid-State Circuits, vol. 31, pp. 656-667, May 1996.
-
(1996)
IEEE J. Solid-state Circuits
, vol.31
, pp. 656-667
-
-
Hawley, R.A.1
Wong, B.C.2
Lin, T.-J.3
Laskowski, J.L.4
Samueli, H.5
-
11
-
-
0016495267
-
Analysis of linear digital networks
-
April
-
R. E. Crochiere and A. V. Oppenheim, "Analysis of linear digital networks," Proc. IEEE, vol. 63, pp. 581-595, April 1975.
-
(1975)
Proc. IEEE
, vol.63
, pp. 581-595
-
-
Crochiere, R.E.1
Oppenheim, A.V.2
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