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Volumn , Issue , 1995, Pages 73-80

An approach for hardware-software codesign

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; SPECIFICATIONS;

EID: 11744275061     PISSN: 10746005     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWRSP.1994.315907     Document Type: Conference Paper
Times cited : (7)

References (14)
  • 2
    • 0001858873 scopus 로고
    • Hardware-Software Cosynthesis for Digital Systems
    • September
    • R. Gupta, G. De Micheli, "Hardware-Software Cosynthesis for Digital Systems", IEEE Design and Test of Computers, pp. 29-41, September 1993.
    • (1993) IEEE Design and Test of Computers , pp. 29-41
    • Gupta, R.1    De Micheli, G.2
  • 4
    • 0001858874 scopus 로고
    • A Hardware-Software Codesign Methodology for DSP Applications
    • September
    • A. Kalavade, E. A. Lee, "A Hardware-Software Codesign Methodology for DSP Applications", IEEE Design and Test of Computers, pp. 16-28, September 1993.
    • (1993) IEEE Design and Test of Computers , pp. 16-28
    • Kalavade, A.1    Lee, E.A.2
  • 5
    • 0003753965 scopus 로고
    • SOLAR: An Intermediate Format for System-Level Modeling and Synthesis
    • J. Rozenblit, K. Buchenrieder (eds), IEEE Press
    • A. A. Jerraya, K. O'Brien, "SOLAR: An Intermediate Format for System-Level Modeling and Synthesis", in "Computer Aided Software/Hardware Engineering", J. Rozenblit, K. Buchenrieder (eds), IEEE Press 1994.
    • (1994) Computer Aided Software/Hardware Engineering
    • Jerraya, A.A.1    O'Brien, K.2
  • 6
    • 0028089438 scopus 로고
    • Interactive System-Level Partitioning with PARTIF
    • Paris, France, February
    • T. Ben Ismail, K. O'Brien, A. A. Jerraya, "Interactive System-Level Partitioning with PARTIF", Proc. EDAC'94. Paris, France, February 1994.
    • (1994) Proc. EDAC'94
    • Ben Ismail, T.1    O'Brien, K.2    Jerraya, A.A.3
  • 8
    • 6244285069 scopus 로고
    • A Design Methodology for System Specification Refinement
    • Paris, France, February
    • D. Gajski, F. Vahid, S. Narayan, "A Design Methodology for System Specification Refinement", Proc. EDAC'94, Paris, France, February 1994.
    • (1994) Proc. EDAC'94
    • Gajski, D.1    Vahid, F.2    Narayan, S.3
  • 9
    • 0025472423 scopus 로고
    • An Interactive Environment for Hardware/Software System Design at the Specification Level
    • S. Antoniazzi, M. Mastretti, "An Interactive Environment For Hardware/Software System Design at the Specification Level", Microprocessing & Microprogramming, Vol. 30, pp. 545-554, 1990.
    • (1990) Microprocessing & Microprogramming , vol.30 , pp. 545-554
    • Antoniazzi, S.1    Mastretti, M.2
  • 10
  • 11
    • 0025540757 scopus 로고
    • An Intermediate Presentation for Behavioral Synthesis
    • Orlando, June
    • N. Dutt et al, "An Intermediate Presentation for Behavioral Synthesis", Proc. 27th DAC, pp. 14-19, Orlando, June 1990.
    • (1990) Proc. 27th DAC , pp. 14-19
    • Dutt, N.1
  • 12
    • 0003762278 scopus 로고
    • Integrating SDL and VHDL for System-Level Hardware Design
    • Ottawa, Canada, April
    • W. Glunz, T. Kruse, T. Rossel, D. Monjau, "Integrating SDL and VHDL for System-Level Hardware Design", Proc. CHDL'93, Ottawa, Canada, April 1993.
    • (1993) Proc. CHDL'93
    • Glunz, W.1    Kruse, T.2    Rossel, T.3    Monjau, D.4
  • 13
    • 10144229896 scopus 로고
    • RAPID: A Tool for Hardware/Software Tradeoff Analysis
    • Ottawa, Canada, April
    • N.L. Rethman, P.A. Wilsey, "RAPID: A Tool for Hardware/Software Tradeoff Analysis", Proc. CHDL '93, Ottawa, Canada, April 1993.
    • (1993) Proc. CHDL '93
    • Rethman, N.L.1    Wilsey, P.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.