A Gaussian noise generator for hardware-based simulations

IEEE Transactions on Computers

Volumn 53, Issue 12, 2004, Pages 1523-1534

  Lee, Dong U ^a   Luk, Wayne ^a   Villasenor, John D ^b   Cheung, Peter Y K ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

^b University of California   (United States)

Author keywords

Algorithms implemented in hardware; Error checking; Gate arrays; Simulation

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; BIT ERROR RATE; CODES (SYMBOLS); DECODING; ERROR CORRECTION; FIELD PROGRAMMABLE GATE ARRAYS; GAUSSIAN NOISE (ELECTRONIC); PIECEWISE LINEAR TECHNIQUES; PROBABILITY DENSITY FUNCTION;

ALGORITHMS IMPLEMENTED-IN-HARDWARE; ERROR CHECKING; GATE ARRAYS; GAUSSIAN NOISE GENERATOR; HARDWARE SIMULATION;

COMPUTER SIMULATION;

EID: 11244310546     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2004.106     Document Type: Article

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