An FPGA based simulation acceleration platform for spiking neural networks

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Hellmich, Heik H ^a   Klar, Heinrich ^a  

^a TECHNISCHE UNIVERSITÄT BERLIN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DISTRIBUTED MEMORY; NEURONS; PRESYNAPTIC NEURONS; PROGRAMMABILITY;

ACCELERATION; BANDWIDTH; COMPUTER SIMULATION; COMPUTER SOFTWARE; MATHEMATICAL MODELS; NEURAL NETWORKS; PERSONAL COMPUTERS; PROBLEM SOLVING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 11144337452     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

1. W. Singer, "Development and Plasticity of Cortical Processing Architectures," Science, Vol. 270, 1995, pp. 758-764.
2. A. Knoblauch, and G. Palm, "Spiking Associative Memory and Scene Segmentation by Synchronization of Cortical Activity," Emergent Neural Computational Architectures based on Neuroscience (Editors: S. Wermter, J. Austin and D. J. Willshaw), Springer Verlag, ISBN 3-540-42363-X, 2001.
3. M. Schäfer, T. Schönauer, C. Wolff, G. Hartmann, H. Klar, and U. Rückert, "Simulation of Spiking Neural Networks: Architectures and Implementations," Neurocomputing, Vol. 48, 2002, pp. 647-679.
4. A. Jahnke, U. Roth, and T. Schönauer, "Digital Simulation of Spiking Neural Networks," Pulsed Neural Networks (Editors: W. Maass and C. M. Bishop), MIT Press, ISBN 0-262-13350-4, 1998.
5. L. M. Reyneri, "Implementation Issues of Neuro-Fuzzy Hardware: Going Toward HW/SW Codesign," IEEE Transaction on Neural Networks, Vol. 14, No. 1, 2003, pp. 176-194.
6. A. Heittmann, U. Ramacher, D. Matolin, J. Schreiter, and R. Schüffny, "An Analog VLSI Pulsed Neural Network for Image Segmentation using Adaptive Connection Weights," International Conference on Artificial Neural Networks (ICANN), 2002, pp. 1293-1298.
7. W. Gerstner, and W. M. Kistler, Spiking Neuron Models - Single Neurons, Populations. Plasticity, Cambridge University Press, ISBN 0-521-81384-0, 2002.
8. M. Porrmann, U. Witkowski, H. Kalte, and U. Rückert, "Implementation of Artificial Neural Networks on a Reconfigurable Hardware Accelerator," Proceedings of the 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing (PDF), 2002, pp. 243-250.
9. H. H. Hellmich, and H. Klar, "SEE: a Concept for an PPGA based Emulation Engine for Spiking Neurons with Adaptive Weights," Proceedings of the 5th WSEAS International Conference on Neural Networks and Applications (NNA), 2004, pp. 390-395.
10. Xilinx, Virtex-II-/-II--Pro Datasheets, http://www.xilinx.com/xlnx/xweb/ xil_publications_index.jsp.
11. 2INN): A System Approach," IEEE Transactions on Neural Networks, Vol. 14, No. 5, 2003, pp. 980-992.
12. J. Stoer, and R. Bulirsch, Numerische Mathematik II, Springer Verlag, 4th Edition, ISBN 3-540-67644-9, 2000.
13. M. V. Mascagni, and A. S. Sherman, "Numerical Methods for Neuronal Modelling," Methods in Neuronal Modelling: From Ions to Networks (Editors: C. Koch and I. Segev), MIT Press, 2nd Edition, ISBN 0-262-11231-0, 1998.
14. Numerical Recipes, Books On-Line, Chapter 16, http://www.nr.com/ nronline_switcher.html.