An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes

Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04

Volumn , Issue , 2004, Pages 381-386

  Gorjiara, Bita ^a   Bagherzadeh, Nader ^a   Chou, Pai ^a  

^a University of California at Irvine   (United States)

Author keywords

Dynamic Voltage Scaling (DVS); Heterogeneous systems; Multi processor systems; Optimization; Power management; Scheduling; Stochastic gradient search

Indexed keywords

DYNAMIC VOLTAGE SCALING (DVC); HETEROGENEOUS SYSTEMS; MULTI-PROCESSOR SYSTEMS; POWER MANAGEMENT; STOCHASTIC GRADIENT SEARCH;

ALGORITHMS; ELECTRIC POTENTIAL; EMBEDDED SYSTEMS; LARGE SCALE SYSTEMS; LINEAR PROGRAMMING; OPTIMIZATION; REAL TIME SYSTEMS; SCHEDULING; XML;

MICROPROCESSOR CHIPS;

EID: 11144309034     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

1. N. Bambha, S. Bhattacharyya, J. Teich, and E. Zitzler, Hybrid Global/Local Search Strategies for Dynamic Voltage Scaling in Embedded Multiprocessors. In Proc. CODES, pages 243-248, April 2001.
2. C. Brandolese, W. Fornaciari, F. Salice, and D. Sciuto, Energy Estimation for 32 bit Microprocessors. In Proc. CODES, pages 24-28, May 2000.
3. S. Devadas and S. Malik, A Survey of Optimization Techniques Targeting Low Power VLSI Circuits. In Proc. Design Automation Conference, 1995.
4. R.P. Dick and N.K. Jha, MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis. In Proc. Design, Automation and Test in Europe, 1999.
5. D. Duarte, Y. Tsai, N. Vijaykrishnan and M. J. Irwin, Evaluating Run-Time Techniques for Leakage Power Reduction, In Proc. VLSID, 2002.
6. Embedded System Synthesis Benchmarks Suite (E3S): http://helsinki.ee.princeton.edu/~dickrp/e3s/
7. F. Gruian and K. Kuchcinski, LEneS: Task Scheduling for Low-Energy Systems Using Variable Supply Voltage Processors. ASPDAC, pages 449-455, Jan 2001.
8. M.R. Garey and D. S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness. W. H. Freeman and Company, NY, 1979.
9. M. Grajcar, Genetic List Scheduling Algorithm for Scheduling and Allocation on a Loosely Coupled Heterogeneous Multiprocessor System. In Proc. DAC, 1999.
10. T. Ishihara and H. Yasuura, Voltage Scheduling Problem for Dynamically Variable Voltage Processors. In Proc. ISLPED, pages 197-202, 1998.
11. L. Leung, C. Tsui, W. Ki, Minimizing Energy Consumption of Multiple-Processor-Core Systems with Simultaneous Task Allocation, Scheduling and Voltage Assignment, In Proc. ASPDAC2004
12. J. Luo and N. K. Jha, Power-conscious Joint Scheduling of Periodic Task Graphs and Aperiodic Tasks in Distributed Real-time Embedded Systems. In Proc. ICCAD, pages 357-364, Nov 2000.
13. A. Manzak and C. Chakrabarti, Variable Voltage Task Scheduling for Minimizing Energy or Minimizing Power. In Proc. ICASSP, pages 3239-3242, 2000.
14. M.T. Schmitz and B. M. Al-Hashimi, Considering Power Variations of DVS Processing Elements for Energy Minimisation in Distributed Systems. In Proc. ISSS, pages 250-255, Oct 2001.
15. M.T. Schmilz and Bashir M. Al-Hashimi, Petru Eles, Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems, In Proc. DATE, 2002.
16. J. Spall, Introduction to Stochastic Search and Optimization, John Wiley & sons, Inc., 2003.
17. Y. Zhang, X. Hu, D. Chen, Task Scheduling and Voltage Selection for Energy Minimization, In Proc. DAC, June 2002.
18. http://www.ece.uci.edu/~bgorjiar
19. Bita Gorjiara, Pai Chou, Nader Bagherzadeh, Dave Jensen, Mehrdad Reshadi, Fast and Efficient Voltage Scheduling by Evolutionary Slack Distribution, In Proc. ASP-DAC, 2004
20. S. Wolf. Silicon processing for the VLSI era Volume 3 - The submicron MOSFET. Lattice Press, 1995, pp. 213-222.