Architecture of a stereo matching VLSI processor based on hierarchically parallel memory access

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Hariyama, Masanori ^a   Sasaki, Haruka ^a   Kameyama, Michitaka ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; INTELLIGENT ROBOTS; OPTIMIZATION; PROBLEM SOLVING; STORAGE ALLOCATION (COMPUTER);

MEMORY ACCESS; PARALLELISM; PROCESSOR ARCHITECTURE; STEREO MATCHING;

VLSI CIRCUITS;

EID: 11144298083     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. S.T.Barnard, "Stereo vision," in Encyclopedia of Artificial Intelligence. New York: John Wiley, pp. 1083-1090(1987).
2. K. Miura, M. Hariyama, M.Kameyama","Stereo Vision VLSI Processor Based on a Recursive Computation Algorithm", in Proc. SICE Annual Conference, pp.2338-2341 (2003).
3. M. Hariyama, T. Takeuchi, M. Kameyama,"VLSI Processor for Reliable Stereo Matching Based on Adaptive Window-Size Selection" in Proc. International Conference on Robotics and Automation, pp.1168-1173(2001).