SCOPUS 정보 검색 플랫폼

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 2004, Pages

An improved low voltage phase-frequency detector with extended frequency capability

(3) Johnson, Tord a Fard, Ali a Åberg, Denny a

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; FREQUENCY SYNTHESIZERS; LOCAL AREA NETWORKS; MATHEMATICAL MODELS; NATURAL FREQUENCIES; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING;

FREQUENCY CAPABILITY; LOW VOLTAGE PHASE-FREQUENCY DETECTOR; VOLTAGE CONTROLLED OSCILLATORS (VCO);

ELECTRIC POTENTIAL;

EID: 11144248886 PISSN: 15483746 EISSN: None Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper

Times cited : (20)

References (7)

1
- 0036287804
- An overview of design techniques for CMOS phase detectors
- IEEE International Symposium on, 26-29 May vol.5
- S. Soliman F. Yuan and K.Raahemifar, "An overview of design techniques for CMOS phase detectors," Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on, Volume: 5, 26-29 May 2002 Pages:V-457 - V-460 vol.5
- (2002) Circuits and Systems, 2002. ISCAS 2002 , vol.5
- Soliman, S.¹ Yuan, F.² Raahemifar, K.³

2
- 18344407294
- Dead-zone-less PLL frequency synthesizer by hybrid phase detectors
- Proceedings of the 1999 IEEE International Symposium on, 30 May-2 June vol.4
- Y. Sumi, S. Obote, N. Kitai, R. Furuhashi, H. Ishii, Y. Matsuda and Y. Fukui, "Dead-zone-less PLL frequency synthesizer by hybrid phase detectors".Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on, Volume: 4, 30 May-2 June 1999 Pages:410-414 vol.4
- (1999) Circuits and Systems, 1999. ISCAS '99 , vol.4 , pp. 410-414
- Sumi, Y.¹ Obote, S.² Kitai, N.³ Furuhashi, R.⁴ Ishii, H.⁵ Matsuda, Y.⁶ Fukui, Y.⁷

3
- 0032309765
- A fully integrated CMOS DCS-1800 frequency synthesizer
- Dec.
- J. Craninckx and M. Steyaert, "A fully integrated CMOS DCS-1800 frequency synthesizer," Solid-State Circuits, IEEE Journal of, Volume: 33, Issue: 12, Dec. 1998 Pages:2054 - 2065
- (1998) Solid-state Circuits, IEEE Journal of , vol.33 , Issue.12 , pp. 2054-2065
- Craninckx, J.¹ Steyaert, M.²

4
- 0038004710
- Dordrecht, The Netherlands: Kluwer Academic Publishers
- C. Toumazou G. Moschytz and B. Gilbert, Trade-offs in analog circuit design: the designer's companion, Dordrecht, The Netherlands: Kluwer Academic Publishers, 2002.
- (2002) Trade-offs in Analog Circuit Design: The Designer's Companion
- Toumazou, C.¹ Moschytz, G.² Gilbert, B.³

5
- 0003857807
- New York. US: McGraw-Hill
- R. E. Best, Phase-locked loops: design, simulation, and applications, 4th ed. New York. US: McGraw-Hill, 1999.
- (1999) Phase-locked Loops: Design, Simulation, and Applications, 4th Ed.
- Best, R.E.¹

6
- 0003850954
- Pearson Education International, Second Edition, New Jersey
- J.M. Rabaey, A. Chandrakasan and B. Nikolic Digital integrated circuits - a design persepective, Pearson Education International, Second Edition, New Jersey, 2003.
- (2003) Digital Integrated Circuits - A Design Persepective
- Rabaey, J.M.¹ Chandrakasan, A.² Nikolic, B.³

7
- 0141856002
- Design of high-performance CMOS charge pumps in phase-locked loops
- Proceedings of the 1999 IEEE International Symposium on, 30 May-2 June vol.2
- W. Rhee, "Design of high-performance CMOS charge pumps in phase-locked loops," Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on, Volume: 2, 30 May-2 June 1999 Pages:545 - 548 vol.2
- (1999) Circuits and Systems, 1999. ISCAS '99 , vol.2 , pp. 545-548
- Rhee, W.¹

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.