A high-swing 2 v CMOS operational amplifier with gain enhancement using a replica amplifier

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1993, Pages 116-117

  Yu, P C ^a   Lee, H S ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE;

CMOS OPERATIONAL AMPLIFIERS; COMMON MODE RANGE; GAIN ENHANCEMENT; LONG CHANNEL TRANSISTORS; LOW-VOLTAGE APPLICATIONS; OUTPUT RESISTANCE; TRANSCONDUCTANCE AMPLIFIER; TWO-STAGE AMPLIFIERS;

OPERATIONAL AMPLIFIERS;

EID: 11044223704     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.1993.280060     Document Type: Conference Paper

References (2)

1. Li, P. W., M. J. Chin, P. R. Gray, R. Castello, "A Ratio Independent Algorithmic Analog-To-Digital Converter", IEEE J. Solid-state Circuits, vol. SC-19, pp. 1138-1143, Dec. 1984
2. Bult, K., G.J.G.M. Geelen, "A Fast Settling CMOS Op Amp for SC Circuits with 90dB Gain", IEEE J. Solid-state Circuits, vol. SC-25, pp. 1379-1384, Dec. 1990.