A hierarchical self test scheme for SoCs

Proceedings - 10th IEEE International On-Line Testing Symposium, IOLTS 2004

Volumn , Issue , 2004, Pages 37-42

  Kretzschmar, Claudia ^a   Galke, Christian ^a   Vierhaus, Heinrich T ^a  

^a BRANDENBURG UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

LINEAR FEEDBACK SHIFT REGISTER (LFSR); LOGIC BLOCKS; MULTIPLE-INPUT SIGNATURE REGISTER (MISR); PSEUDO-RANDOM TESTING;

AUTOMATION; COMPUTATIONAL COMPLEXITY; COMPUTER SOFTWARE; LARGE SCALE SYSTEMS; LOGIC PROGRAMMING; OPTIMIZATION; REDUCED INSTRUCTION SET COMPUTING; ROM; SHIFT REGISTERS;

LOGIC CIRCUITS;

EID: 10444237225     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2004.1319657     Document Type: Conference Paper

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