Architectural support for high speed protection of memory integrity and confidentiality in multiprocessor systems

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2004, Pages 123-134

  Shi, Weidong ^a   Lee, Hsien Hsin S ^a   Ghosh, Mrinmoy ^a   Lu, Chenghuai ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTHENTICATION; AUTHENTICATION SPECULATIVE EXECUTION (ASE); MEMORY CONTROLLER; MEMORY PROTECTION;

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; CRYPTOGRAPHY; DATA COMMUNICATION SYSTEMS; LOGIC GATES;

MULTIPROCESSING SYSTEMS;

EID: 10444227999     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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