New high speed CMOS self-checking voter

Proceedings - 10th IEEE International On-Line Testing Symposium, IOLTS 2004

Volumn , Issue , 2004, Pages 58-63

  Cazeaux, José Manuel ^a   Rossi, Daniele ^a   Metra, Cecilia ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

MAJORITY VOTING CIRCUIT (MVC); ON-LINE TESTING; POWER CONSUMPTION; TRIPLE MODULAR REDUNDANCY (TMR);

COMPUTATIONAL COMPLEXITY; COSTS; ELECTRIC FAULT CURRENTS; ERROR DETECTION; LOGIC GATES; ONLINE SYSTEMS; REDUNDANCY; TREES (MATHEMATICS);

CMOS INTEGRATED CIRCUITS;

EID: 10444227261     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2004.1319660     Document Type: Conference Paper

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