Design and simulation of high-voltage CMOS devices compatible with standard CMOS technologies

Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors

Volumn 24, Issue 7, 2003, Pages 758-762

  Liu, Kuiwei ^a   Han, Zhengsheng ^a,b   Qian, He ^a,b   Chen, Zerui ^c   Yu, Yang ^c   Rao, Jingshi ^c   Xian, Wenling ^c  

^a INSTITUTE OF GEOLOGY AND GEOPHYSICS   (China)

^b Shouke Microelectronics Indust Co   (China)

^c RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

0.5 m; Compatible technology; High voltage CMOS; Simulation

Indexed keywords

COMPUTER SIMULATION; DESIGN; MANUFACTURE;

BREAK DOWN VOLTAGES; COMPATIBLE MANUFACTURING TECHNOLOGIES;

CMOS INTEGRATED CIRCUITS;

EID: 0742319101     PISSN: 02534177     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)

1. Bassin C, Ballan H, Declercq M. High voltage devices for 0.5μm standard CMOS technology. IEEE Electron Device Lett, 2000, 121(1): 40
2. Ballan H, Declercq M. High voltage devices and circuits in standard CMOS technologies. Kluwer Academic Publisher, 1999
3. Appels J A, Vaes H M J. High voltage thin layer devices (resurf devices). In: Proceedings of 25th Int Electron Devices Meeting, 1979: 238
4. He Jin, Zhang Xing, Huang Ru, et al. 2-dimensional analysis of surface electric field profile of planar junction with single-step field-plate termination structure. Chinese Journal of Semiconductors, 2001, 22(7): 915 (in Chinese)
5. Wolf S. Silicon processing for the VLSI era process integration. Lattice Press, 1990
6. Synopsys TCAD manual: TSUPREM-4 Version 2001. 4