A new synthesis technique of sequential circuits for low power and testing

Current Applied Physics

Volumn 4, Issue 1, 2004, Pages 83-86

  Cho, Sangwook ^a   Park, Sungju ^a  

^a Hanyang University   (South Korea)

Author keywords

Low power; Scan design; State assignment; Test synthesis; Testability

Indexed keywords

EID: 0742271945     PISSN: 15671739     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.cap.2003.09.017     Document Type: Article

References (12)

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