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Volumn 4, Issue , 2001, Pages 13-16

Built-in self-repair for divided word line memory

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF-REPAIR; FAULT-TOLERANT ARCHITECTURES; HARDWARE OVERHEADS; HIGH-CAPACITY MEMORY; MEMORY CELL ARRAYS; REPAIR RATE;

EID: 0742267423     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922156     Document Type: Conference Paper
Times cited : (9)

References (9)
  • 1
    • 85047949733 scopus 로고
    • Redundancy techniques for fast static RAMs
    • Feb
    • K. Kokkonen et al, "Redundancy techniques for fast static RAMs," ISSCC Dig. Tech., pp. 80-81, Feb. 1981.
    • (1981) ISSCC Dig. Tech , pp. 80-81
    • Kokkonen, K.1
  • 2
    • 0025480909 scopus 로고
    • A novel built-in self-repair approach to VLSI memory yield enhancement
    • Sept
    • R Mazumder, and J. S. Yih, "A novel built-in self-repair approach to VLSI memory yield enhancement," International Test Conference, pp. 833-841, Sept. 1990.
    • (1990) International Test Conference , pp. 833-841
    • Mazumder, R.1    Yih, J.S.2
  • 5
  • 7
    • 0029288557 scopus 로고
    • Trends in low-power RAM circuit technologies
    • Apr
    • K. Itoh, K. Sasaki, and Y. Nakagome, "Trends in low-power RAM circuit technologies," Proceedings of The IEEE, vol. 83, pp. 524-543, Apr. 1995.
    • (1995) Proceedings of the IEEE , vol.83 , pp. 524-543
    • Itoh, K.1    Sasaki, K.2    Nakagome, Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.