Generating formal models for real-time verification by exact low-level runtime analysis of synchronous programs

Proceedings - Real-Time Systems Symposium

Volumn , Issue , 2003, Pages 256-264

  Logothetis, G ^a   Schneider, K ^b   Metzler, C ^a  

^a UNIVERSITY OF KARLSRUHE   (Germany)

^b Rheinland Pfälzische Technische Universität Kaiserslautern Landau   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; CONSTRAINT THEORY; EMBEDDED SYSTEMS; MACROS; PROGRAM COMPILERS;

LOW-LEVEL RUNTIME ANALYSIS; REAL-TIME VERIFICATION; SYNCHRONOUS LANGUAGES; SYNCHRONOUS PROGRAMS;

REAL TIME SYSTEMS;

EID: 0348195768     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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