-
1
-
-
0023963509
-
Synchronization, coherence, and event ordering in multi-processor
-
February
-
M. Dubois, C. Scheurich, and F. A. Briggs, "Synchronization, coherence, and event ordering in multi-processor," IEEE Computer, vol. 21, no. 2, pp. 9-21, February 1988.
-
(1988)
IEEE Computer
, vol.21
, Issue.2
, pp. 9-21
-
-
Dubois, M.1
Scheurich, C.2
Briggs, F.A.3
-
2
-
-
0022138618
-
Hot spot contention and combining in multistage interconnection networks
-
October
-
G. F. Pfister and V. A. Norton, "Hot spot contention and combining in multistage interconnection networks," IEEE Transactions on Computers, vol. 34, no. 10, pp. 943-948, October 1985.
-
(1985)
IEEE Transactions on Computers
, vol.34
, Issue.10
, pp. 943-948
-
-
Pfister, G.F.1
Norton, V.A.2
-
4
-
-
0025488794
-
Priority inheritance protocols: An approach to real-time synchronization
-
September
-
L. Sha, R. Rajkumar, and J. P. Lehoczky, "Priority inheritance protocols: An approach to real-time synchronization," IEEE Transactions on Computers, vol. 39, no. 9, pp. 1175-1185, September 1990.
-
(1990)
IEEE Transactions on Computers
, vol.39
, Issue.9
, pp. 1175-1185
-
-
Sha, L.1
Rajkumar, R.2
Lehoczky, J.P.3
-
5
-
-
0024173219
-
Real-time synchronization protocols for multiprocessors
-
December
-
R. Rajkumar, L. Sha, and J. P. Lehoczky, "Real-time synchronization protocols for multiprocessors," Real Time Systems Symposium, pp. 259-269, December 1988.
-
(1988)
Real Time Systems Symposium
, pp. 259-269
-
-
Rajkumar, R.1
Sha, L.2
Lehoczky, J.P.3
-
6
-
-
23544449261
-
Multiprocessor priority ceiling based protocols
-
Tech. Rep. CS-TR-3252, Department of Computer Science, University of Maryland, April
-
C. Chen and S. K. Tripathi, "Multiprocessor priority ceiling based protocols," Tech. Rep. CS-TR-3252, Department of Computer Science, University of Maryland, April 1994.
-
(1994)
-
-
Chen, C.1
Tripathi, S.K.2
-
7
-
-
0026118563
-
Stack-based scheduling of realtime processes
-
T. P. Baker, "Stack-based scheduling of realtime processes," The Journal of Real-Time Systems, vol. 3, pp. 67-100, 1991.
-
(1991)
The Journal of Real-Time Systems
, vol.3
, pp. 67-100
-
-
Baker, T.P.1
-
8
-
-
0347747349
-
An analysis of input/output paradigms for real-time systems
-
Tech. Rep. CMU/SEI-90-TR-19, Software Engineering Institute, Carnegie Mellon University
-
M. H. Klein and T. Ralya, "An analysis of input/output paradigms for real-time systems," Tech. Rep. CMU/SEI-90-TR-19, Software Engineering Institute, Carnegie Mellon University, 1990.
-
(1990)
-
-
Klein, M.H.1
Ralya, T.2
-
10
-
-
84893800341
-
A system-on-a-chip lock cache with task preemption support
-
November
-
B. E. S. Akgul, J. Lee, and V. J. Mooney, "A system-on-a-chip lock cache with task preemption support," Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES'01), pp. 149-157, November 2001.
-
(2001)
Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES'01)
, pp. 149-157
-
-
Akgul, B.E.S.1
Lee, J.2
Mooney, V.J.3
-
11
-
-
0036733458
-
The system-on-a-chip lock cache
-
September
-
B. E. S. Akgul, and V. J. Mooney, "The system-on-a-chip lock cache," International Journal of Design Automation for Embedded Systems, vol. 7, no. 1-2, pp. 139-174, September 2002.
-
(2002)
International Journal of Design Automation for Embedded Systems
, vol.7
, Issue.1-2
, pp. 139-174
-
-
Akgul, B.E.S.1
Mooney, V.J.2
-
13
-
-
0345855825
-
Atlanta: A new multiprocessor RTOS kernel for system-on-a-chip applications
-
Tech. Rep. GIT-CC-02-19, Georgia Institute of Technology, College of Computing, Atlanta, GA, March 2002
-
S. Di-Shi, D. Blough, and V. J. Mooney, "Atlanta: a new multiprocessor RTOS kernel for system-on-a-chip applications," Tech. Rep. GIT-CC-02-19, Georgia Institute of Technology, College of Computing, Atlanta, GA, March 2002. Available at: http://www.gatech.edu/tech_reports/.
-
-
-
Di-Shi, S.1
Blough, D.2
Mooney, V.J.3
-
15
-
-
84871574990
-
Priority ceiling protocol in ada
-
December
-
Y. Kwok-bun, S. Davari, and T. Leibfried, "Priority ceiling protocol in ada," Conference Proceedings on Disciplined Software Development with Ada, vol. 3, no. 9, pp. 3-9, December 1996.
-
(1996)
Conference Proceedings on Disciplined Software Development with Ada
, vol.3
, Issue.9
, pp. 3-9
-
-
Kwok-Bun, Y.1
Davari, S.2
Leibfried, T.3
-
16
-
-
0347116952
-
-
Mentor Graphics. Hardware/Software Co-Verification: Seamless
-
Mentor Graphics. Hardware/Software Co-Verification: Seamless. Available at: http://www.mentor.com/seamless/.
-
-
-
-
17
-
-
0347747353
-
-
Synopsys VCS Verilog Simulator
-
Synopsys VCS Verilog Simulator. Available at: http://www.synopsys.com/products/simulation/simulation.html
-
-
-
-
19
-
-
0346486637
-
-
Synopsis Design Compiler
-
Synopsis Design Compiler. Available at: http://www.synopsys.com/products/logic/design_compiler.html.
-
-
-
-
20
-
-
0345855833
-
-
LEDA Systems, Inc.
-
LEDA Systems, Inc. Available at: http://www.ledasys.com/.
-
-
-
|