Automatic modeling and validation of pipeline specifications driven by an architecture description language [SoC]

Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference on VLSI Design, ASP-DAC/VLSI Design 2002

Volumn , Issue , 2002, Pages 458-463

  Mishra, P ^a   Tomiyama, H ^b   Halambi, A ^a   Grun, P ^a   Dutt, N ^a   Nicolau, A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Institute of Systems & Information Technologies/KYUSHU   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL LINGUISTICS; COMPUTER AIDED DESIGN; DESIGN; GRAPHIC METHODS; MODELING LANGUAGES; PIPELINES; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEM-ON-CHIP;

ARCHITECTURAL DOMAIN; ARCHITECTURE DESCRIPTION LANGUAGES; AUTOMATIC VALIDATION; GRAPH-BASED MODELING; PIPELINE SPECIFICATIONS; PIPELINED ARCHITECTURE; PIPELINED PROCESSOR; TOP DOWN APPROACHES;

PIPELINE PROCESSING SYSTEMS;

EID: 0347489080     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2002.994963     Document Type: Conference Paper

References (13)

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