Cache Optimization for Embedded Processor Cores: An Analytical Approach

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 342-347

  Ghosh, Arijit ^a   Givargis, Tony ^a  

^a Irvine   (United States)

Author keywords

Cache Optimization; Core Based Design; Design Space Exploration; System on a Chip

Indexed keywords

ALGORITHMS; BENCHMARKING; BUFFER STORAGE; COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA REDUCTION; EMBEDDED SYSTEMS; HIERARCHICAL SYSTEMS; SYSTEMS ANALYSIS;

COMPUTING PLATFORMS; DESIGN SPACE EXPLORATION; EMBEDDED PROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0347409194     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.2003.159709     Document Type: Conference Paper

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