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Volumn 11, Issue 4, 2002, Pages 393-403

Design of modified four-phase CMOS charge pumps for low-voltage flash memories

Author keywords

Body effects; Boosted clocks; Charge pumping circuits; Four phase clock scheme; Power efficiency; Pumping gain

Indexed keywords


EID: 0346674013     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126602000537     Document Type: Article
Times cited : (9)

References (10)
  • 2
    • 0026953506 scopus 로고
    • A 5-V-only 16-Mb flash memory with sector erase mode
    • T. Jinbo et al., "A 5-V-only 16-Mb flash memory with sector erase mode", IEEE J. Solid-State Circuits 27 (1992) 1547-1553.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1547-1553
    • Jinbo, T.1
  • 3
    • 0028419762 scopus 로고
    • A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation
    • S. Atsumi et al., "A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation", IEEE J. Solid-State Circuits 29 (1994) 461-469.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 461-469
    • Atsumi, S.1
  • 4
    • 0016961262 scopus 로고
    • On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique
    • J. F. Dickson, "On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique", IEEE J. Solid-State Circuits 11 (1976) 374-378.
    • (1976) IEEE J. Solid-State Circuits , vol.11 , pp. 374-378
    • Dickson, J.F.1
  • 5
    • 0001050518 scopus 로고    scopus 로고
    • MOS charge pumps for low-voltage operation
    • J.-T. Wu and K.-L. Chang, "MOS charge pumps for low-voltage operation", IEEE J. Solid-State Circuits 33 (1998) 592-596.
    • (1998) IEEE J. Solid-State Circuits , vol.33 , pp. 592-596
    • Wu, J.-T.1    Chang, K.-L.2
  • 6
    • 0003774931 scopus 로고    scopus 로고
    • Novel high positive and negative pumping circuits for low supply voltage
    • H. Lin, K.-H. Chang, and S.-C. Wong, "Novel high positive and negative pumping circuits for low supply voltage", IEEE Int. Symp. Circuits Syst. 1 (1999) 238-241.
    • (1999) IEEE Int. Symp. Circuits Syst. , vol.1 , pp. 238-241
    • Lin, H.1    Chang, K.-H.2    Wong, S.-C.3
  • 7
    • 0037142486 scopus 로고    scopus 로고
    • Substrate-connected high voltage pumping circuits for low supply voltages
    • H. Lin and K.-H. Chang, "Substrate-connected high voltage pumping circuits for low supply voltages", IEE Electron. Lett. 38, 13 (2002) 625-626.
    • (2002) IEE Electron. Lett. , vol.38 , Issue.13 , pp. 625-626
    • Lin, H.1    Chang, K.-H.2
  • 10
    • 0026138627 scopus 로고
    • An experimental 1.5-V 64-Mb DRAM
    • Y. Nakagome et al., "An experimental 1.5-V 64-Mb DRAM", IEEE J. Solid-State Circuits 26 (1991) 465-472.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 465-472
    • Nakagome, Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.