|
Volumn , Issue , 2000, Pages 46-50
|
Study of power module package structures
|
Author keywords
[No Author keywords available]
|
Indexed keywords
BUSBARS;
ELECTRIC POWER SYSTEMS;
STRUCTURAL OPTIMIZATION;
CHIP LAYOUT;
CHIP TEMPERATURE;
CONTACT THERMAL RESISTANCE;
HIGH CURRENTS;
POWER MODULE;
REDUCTION METHOD;
STRAY INDUCTANCES;
SURGE VOLTAGE;
CHIP SCALE PACKAGES;
|
EID: 0346281411
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/IWIPP.2000.885180 Document Type: Conference Paper |
Times cited : (5)
|
References (2)
|