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Volumn , Issue , 2003, Pages 954-959

Layered, multi-threaded, high-level performance design

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN MODIFICATIONS; HIGH-LEVEL MODELING; INSTRUCTION SET SIMULATORS; INTERACTING SYSTEM; NETWORK PROCESSOR; PERFORMANCE DESIGN; PERFORMANCE IMPACT; SYSTEM ARCHITECTURES;

EID: 0345855761     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253728     Document Type: Conference Paper
Times cited : (27)

References (12)
  • 1
    • 3242749833 scopus 로고    scopus 로고
    • A layered, codesign virtual machine approach to modeling computer systems
    • J. Paul, D. Thomas. A layered, codesign virtual machine approach to modeling computer systems DATE 2002
    • (2002) DATE
    • Paul, J.1    Thomas, D.2
  • 2
    • 0034837772 scopus 로고    scopus 로고
    • Modeling and evaluation of hardware/software designs
    • N. Tibrewala, J. Paul, D. Thomas. Modeling and Evaluation of Hardware/Software DesignsCODES 2001
    • (2001) CODES
    • Tibrewala, N.1    Paul, J.2    Thomas, D.3
  • 4
    • 84893770854 scopus 로고    scopus 로고
    • Event model interfaces for heterogeneous system analysis
    • K. Richter, R. Ernst. Event model interfaces for heterogeneous system analysis DATE 2002
    • (2002) DATE
    • Richter, K.1    Ernst, R.2
  • 5
    • 0036051047 scopus 로고    scopus 로고
    • Automatic generation of embedded memory wrapper for multiprocessor SoC
    • F. Gharsalli, S. Meftali, F. Rousseau, A. Jerraya. Automatic generation of embedded memory wrapper for multiprocessor SoC DAC 2002
    • (2002) DAC
    • Gharsalli, F.1    Meftali, S.2    Rousseau, F.3    Jerraya, A.4
  • 7
    • 0001951703 scopus 로고
    • System timing
    • C. Mead L. Conway. Reading, MA Addison-Wesley
    • C.L. Seitz. System timing. Introduction to VLSI Systems.C. Mead, L. Conway. Reading, MA: Addison-Wesley, 1980
    • (1980) Introduction to VLSI Systems
    • Seitz, C.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.