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Volumn , Issue , 1990, Pages 454-464

On finding non-intersecting paths in grids and its application in reconfiguring VLSI/WSI arrays

Author keywords

[No Author keywords available]

Indexed keywords

POLYNOMIAL APPROXIMATION;

EID: 0345750456     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (10)

References (7)
  • 1
    • 0021508867 scopus 로고
    • Configuration of VLSI arrays in the presence of defects
    • October
    • J. W. Greene and A. El Gamal. Configuration of VLSI Arrays in the presence of defects. JACM, 31, No. 4:694-717, October 1984.
    • (1984) JACM , vol.31 , Issue.4 , pp. 694-717
    • Greene, J.W.1    El Gamal, A.2
  • 2
    • 0022715631 scopus 로고
    • Efficient algorithms for geometric graph search problems
    • May
    • H. Imai and T. Asano. Efficient Algorithms for Geometric Graph Search Problems. SIAM Journal on Computing, 15, No. 2:478-494, May 1986.
    • (1986) SIAM Journal on Computing , vol.15 , Issue.2 , pp. 478-494
    • Imai, H.1    Asano, T.2
  • 3
    • 0024862652 scopus 로고
    • Necessary and sufficient conditions for reconfigurability in singletrack switch WSI arrays
    • January
    • S. N. Jean and S. Y. Kung. Necessary and Sufficient Conditions for Reconfigurability in Singletrack switch WSI Arrays. Appeared in Proc. of Int. Conf. on Wafer Scale Integration, January 1989.
    • (1989) Proc. of Int. Conf. on Wafer Scale Integration
    • Jean, S.N.1    Kung, S.Y.2
  • 4
    • 6044270151 scopus 로고
    • Fault-tolerant array processors using singletrack switches
    • April
    • S. Y. Kung, S. N. Jean, and C. W. Chang. Fault-Tolerant Array Processors Using Singletrack Switches. IEEE Trans, on Computers, 38, No. 4:501-514, April 1989.
    • (1989) IEEE Trans, on Computers , vol.38 , Issue.4 , pp. 501-514
    • Kung, S.Y.1    Jean, S.N.2    Chang, C.W.3
  • 5
    • 0022055954 scopus 로고
    • Wafer-scale integration of systolic arrays
    • May
    • T. Leighton and C. E. Leiserson. Wafer-Scale Integration of Systolic arrays. IEEE Trans, on Computers, C-34, No. 5:448-461, May 1985.
    • (1985) IEEE Trans, on Computers , vol.C-34 , Issue.5 , pp. 448-461
    • Leighton, T.1    Leiserson, C.E.2
  • 6
    • 0022719928 scopus 로고
    • Reconfigurable architectures for VLSI processing arrays
    • May
    • M. Sami and R. Stefanelli. Reconfigurable architectures for VLSI processing arrays. Proc. of the IEEE, pages 712-722, May 1986.
    • (1986) Proc. of the IEEE , pp. 712-722
    • Sami, M.1    Stefanelli, R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.