A concurrent fault simulation for crosstalk faults in sequential circuits

Proceedings of the Asian Test Symposium

Volumn 2002-January, Issue , 2002, Pages 182-187

  Phadoongsidhi, M ^a   Le, K T ^b   Saluja, K K ^a  

^a University of Wisconsin Madison   (United States)

^b UNIVERSITY OF CANBERRA   (Australia)

Author keywords

Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Crosstalk; Electrical fault detection; Fault detection; Sequential analysis; Sequential circuits

Indexed keywords

CIRCUIT SIMULATION; CROSSTALK; ECONOMIC AND SOCIAL EFFECTS; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; SEQUENTIAL CIRCUITS;

BENCHMARK TESTING; CIRCUIT FAULTS; CIRCUIT TESTING; COMPUTATIONAL MODEL; ELECTRICAL FAULT DETECTIONS; SEQUENTIAL ANALYSIS;

FAULT DETECTION;

EID: 0345272594     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ATS.2002.1181708     Document Type: Conference Paper

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