-
1
-
-
84893561614
-
Optimal state assignment of finite state machines
-
vol. CAD-4, July
-
G.D. Micheli, R. K. Brayton, and A. Sangiovanni-Vincentelli, "Optimal state assignment of finite state machines, ", IEEE Trans. Computer-Aided Design, vol. CAD-4, pp.269-285, July 1985.
-
(1985)
IEEE Trans. Computer-Aided Design
, pp. 269-285
-
-
Micheli, G.D.1
Brayton, R.K.2
Sangiovanni-Vincentelli, A.3
-
2
-
-
0024168714
-
MUSTANG : State assignment of finite state machines targeting multi-level logic implementations
-
vol. CAD-7, Dec
-
S. Devadas, H.-K. Ma, A. R. Newton, and A. Sangiovanni-Vincentelli, "MUSTANG : State Assignment of Finite State Machines Targeting Multi-Level Logic Implementations, ", IEEE Trans. Computer-Aided Design, vol. CAD-7, pp. 1290-1300, Dec 1988.
-
(1988)
IEEE Trans. Computer-Aided Design
, pp. 1290-1300
-
-
Devadas, S.1
Ma, H.-K.2
Newton, A.R.3
Sangiovanni-Vincentelli, A.4
-
4
-
-
0023531381
-
Algorithms for hardware allocation on datapath synthesis
-
New York, October
-
S. Devadas and A. Richard Newton, "Algorithms for hardware allocation on datapath synthesis", Proc. of ICCD:VLSI In Computers, New York, October 1987, pp.526-531.
-
(1987)
Proc. of ICCD:VLSI in Computers
, pp. 526-531
-
-
Devadas, S.1
Newton, A.R.2
-
5
-
-
33747978920
-
Linear ordering by stochastic evolution
-
New Delhi, Jan'91
-
Y. Saab and V. Rao, "Linear ordering by stochastic evolution", VLSI Design'91, New Delhi, Jan'91, pp. 130-135.
-
VLSI Design'91
, pp. 130-135
-
-
Saab, Y.1
Rao, V.2
-
7
-
-
0023031145
-
A versatile finite state machine synthesizer
-
Santa Clara, CA, 206-209, Nov
-
C. Tseng et al., "A versatile finite state machine synthesizer, " in Proc. Int. Conf. on Computer-Aided Design, Santa Clara, CA, pp.206-209, Nov. 1986.
-
(1986)
Proc. Int. Conf. on Computer-Aided Design
-
-
Tseng, C.1
-
8
-
-
0024122851
-
Synthesis and optimization procedures for fully and easily testable sequential machines
-
Washington D.C. September
-
S. Devadas, H.T. Ma, A.R. Newton and A. Sangiovanni-Vincentelli, "Synthesis and optimization procedures for fully and easily testable sequential machines, Proc. of International Test Conference, Washington D.C., September 1988.
-
(1988)
Proc. of International Test Conference
-
-
Devadas, S.1
Ma, H.T.2
Newton, A.R.3
Sangiovanni-Vincentelli, A.4
-
9
-
-
0003567872
-
-
New York: Kluwer Academic
-
R. K Brayton, C. T. McMullen, G.D. Hachtel, and A.L. Sangiovanni-Vincentelli, "Logic Minimization Algorithms for VLSI Synthesis, " New York: Kluwer Academic, 1984.
-
(1984)
Logic Minimization Algorithms for VLSI Synthesis
-
-
Brayton, R.K.1
McMullen, C.T.2
Hachtel, G.D.3
Sangiovanni-Vincentelli, A.L.4
-
10
-
-
33747834679
-
MIS: A multiple level logic optimization system
-
vol. CAD-6, Nov
-
R. K. Brayton, R. Rudell, A. Sangiovanni-Vincentelli, and A. Wang, "MIS: A multiple level logic optimization system, " IEEE Trans. Computer-Aided Design, vol. CAD-6, Nov. 1987.
-
(1987)
IEEE Trans. Computer-Aided Design
-
-
Brayton, R.K.1
Rudell, R.2
Sangiovanni-Vincentelli, A.3
Wang, A.4
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