Local cluster neural net analog VLSI design

Neurocomputing

Volumn 19, Issue 1-3, 1998, Pages 185-197

  Sitte, Joaquin ^a   Körner, Tim ^b   Rückert, Ulrich ^b  

^a UNIVERSITY OF QUEENSLAND   (Australia)

^b UNIVERSITY OF PADERBORN   (Germany)

Author keywords

Analog VLSI; In loop training; Localised activation; Multi layer perceptron; Neural net hardware; Subthreshold CMOS

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL TECHNIQUES; VLSI CIRCUITS;

ANALOG VLSI; SUBTHRESHOLD CMOS;

NEURAL NETWORKS;

ACCURACY; ARTICLE; COMPUTER SIMULATION; CONTROL SYSTEM; DIGITAL COMPUTER; MODEL; NERVE CELL NETWORK; PRIORITY JOURNAL; TRAINING;

EID: 0344404248     PISSN: 09252312     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0925-2312(97)00064-7     Document Type: Article

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