An AMBA-ARM7 formal verification platform

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2885, Issue , 2003, Pages 48-67

  Susanto, Kong Woei ^a   Melham, Tom ^b  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

^b UNIVERSITY OF OXFORD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ARM PROCESSORS; COMPUTER SOFTWARE REUSABILITY; INTEGRATED CIRCUIT DESIGN; PROGRAMMABLE LOGIC CONTROLLERS; SPECIFICATIONS; SYSTEM-ON-CHIP;

FORMAL PROPERTIES; FORMAL SYSTEMS; PLATFORM BASED DESIGN; REMAINING COMPONENT; STANDARD COMPONENTS; SYSTEM ON CHIP DESIGN; VERIFICATION PLATFORMS; WORKING SYSTEMS;

FORMAL VERIFICATION;

EID: 0344392689     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-39893-6_5     Document Type: Article

References (27)

1. Mark D. Aagaard, Robert B. Jones, and Carl-John H. Seger. Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment, in the 35th Design Automation Conference, San Francisco, California, June 1998, pp. 538-541.
2. ARM, ARM-7 Datasheet, DDI 0020C, December 1994.
3. ARM, AMBA specification ver 2.0, IHI-0011A, May 1999.
4. Mark Birnbaum and Howard Sachs, How VSIA Answers the SOC Dilemma, IEEE Computer magazine, June 1999, pp. 42-50.
5. A.J. Camilleri, A Hybrid Approach to Verifying Liveness in a Symmetric Multi-Processor, Eds Elsa L. Gunter and Amy Felty in Theorem Proving in Higher Order Logic, Murray Hill, New Jersey, August 1997, Springer-Verlag LNCS 1275, pp. 49-67.
6. Henry Chang, Larry Cooke, Merrill Hunt, Grant Martin, Andrew McNelly, and Lee Todd. Surviving the SOC Revolution. A Guide to Platform-Based Design, Kluwer, 1999.
7. Louise A. Dennis, Graham Collins, Michael Norrish, Richard Boulton, Konrad Slind, Graham Robinson, Mike Gordon, and Tom Melham. The PROSPER Toolkit, Eds S. Graf and M. Schwartzbach in Tools and Algorithms for the Construction and Analysis of Systems: 6th International Conference, TACAS 2000, Berlin, March/April 2000, Springer-Verlag LNCS 1785, pp. 78-92.
8. M.J.C. Gordon and T.F. Melham, editors. Introduction to HOL: A theorem proving environment for higher order logic, Cambridge University Press, 1993.
9. The HOL System Description, HOL98 Taupo-6, University of Cambridge, February 2000.
10. W.A. Hunt. FM8501: A Verified Microprocessor, 1994, Springer-Verlag LNCS 795.
11. C.N.Ip and D.L.Dill. Better Verification Through Symmetry, Eds D. Agnew, L. Claesen, and R. Compasano, Computer Hardware Description Languages and their Applications, Elsevier Science Publishers B.V., Amsterdam, Netherland, pp. 87-100.
12. R.B. Jones, J.W. O'Leary, C.-J.H. Seger, M.D. Aagaard, and T.F. Melham. Practical Formal Verification in Microprocessor Design, IEEE Design & Test of Computers magazine, July/August 2001, pp. 16-25.
13. Mark Litterick, ARM Integration Platform Power Management, The Institute of System Level Integration, Scotland, November 2001.
14. Matt Kaufmann, Panagiotis Manolios, and J Strother Moore. Computer-Aided Reasoning, An Approach, Kluwer, 2000.
15. Matt Kaufmann, Panagiotis Manolios, and J Strother Moore. Computer-Aided Reasoning, ACL2 Case Studies, Kluwer, 2000.
16. Michael Keating and Pierre Bricaud, Reuse Methodology Manual For System-On-a-Chip Designs, Kluwer Academic Publisher, Norwell Massachusetts, 1999.
17. Kenneth L. McMillan, Symbolic Model Checking, Kluwer Academic Publisher, Norwell Massachussetts, 1993.
18. J Strother Moore, Symbolic Simulation: An ACL2 Approach. Eds Ganesh Gopalakrishnan and Phillip Windley in Formal Methods in Computer-Aided. Design, PaloAlto, California, November 1998, Springer-Verlag LNCS 1522, pp.334-350.
19. Carl Pixley, Formal Verification of Commercial Integrated Circuits, IEEE Design & Test of Computers magazine, July/August 2001, pp.4-5.
20. RAPIER, The Institute of System Level Integration, Scotland, 2001.
21. Ann Marie Rincon, Cory Cherichetti, James A. Monzel, David R. Stauffer, and Michael T. Trick. Core Design and System-on-a-Chip Integration, IEEE Design & Test of Computers magazine, October-December 1997, pp. 26-35.
22. K. Schneider. Yet another look at LTL model checking. Eds Laurence Pierre, and Thomas Kropf, in IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design and verification Methods, Bad Herrenalb, Germany, September 1999, Springer-Verlag LNCS 1703, pp.321-325.
23. Kanna Shimizu, David L. Dill, and Ching-Tsun Chou. A Specification Methodology by a Collection of Compact Properties as Applied to the Intel Itanium Processor Bus Protocol. Eds Tiziana Margaria, and Tom Melham, In Correct Hardware Design and verification Methods, September 1999, Springer-Verlag LNCS 2144, pp.340-354.
24. Madayam Srivas, Harald Rue, and David Cyrluk. Hardware Verification using PVS in Formal Hardware Verification Methods and Systems in Comparison, edited by Thomas Kropf, July 1997, Springer Verlag LNCS 1287, pp: 156-205.
25. Mark Staples, Linking ACL2 and Hoi, Computer Laboratory, University of Cambridge, Technical Report No. 476, November 1999.
26. Kong Woei Susanto, An integrated Formal Approach for System on Chip, In IP based Design, Grenoble, France, October 2002, pp: 119-123.
27. Patrick Henry Winston and Berthold Klaus Paul Horn, LISP, Addison-Wesley Pub.Co., 1989.