An efficient solution for wire sweep analysis in IC packaging

Journal of Electronic Packaging

Volumn 125, Issue 1, 2003, Pages 139-143

  Su, Jerry ^a   Hwang, Sheng Jye ^a   Su, Francis ^b   Chen, Shou Kang ^b  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^b ChipMOS TECHNOLOGIES Bermuda LTD   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; DEFORMATION; ELECTRIC WIRE; ENCAPSULATION; EQUATIONS OF MOTION; INTEGRATED CIRCUITS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS;

DRAG FORCE; GLOBAL FLOW ANALYSIS; LAMBS MODEL; LOCAL FLOW ANALYSIS; PIN-COUNT PACKAGES; WIRE SWEEP ANALYSIS;

ELECTRONICS PACKAGING;

EID: 0344119445     PISSN: 10437398     EISSN: None     Source Type: Journal    
DOI: 10.1115/1.1535447     Document Type: Article

References (6)

1. Han, S., 1994, "A Study on Plastic Encapsulation of Semiconductor Chips," Cornell Injection Molding Program Technical Report No. 77.
2. Han, S., and Wang, K. K., 1993. "Analysis of Wire Sweep Related to Encapsulation of Semiconductor Chips," Chap. X, CIMP Progress Report No. 17.
3. Han, S., and Wang, K. K., 1993. "A Study on the Effects of Fillers on Wire Sweep Related to Semiconductor Chip Encapsulation," ASME Winter Annual Meeting.
4. Han, S., and Wang, K. K., 1995. "Flow Analysis in a Cavity with Leadframe during Semiconductor Chip Encapsulation," Advances in Electronic Packaging ASME EEP-Vol. 10-1.
5. C-MOLD Reactive Molding and Microchip Encapsulation Training Guide, C-MOLD Pacific.
6. Idelchik, I. E., 1994, Handbook of Hydraulic Resistance, CRC Press.