Growable FPGA macro generator

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1142, Issue , 1996, Pages 307-316

  Yasar, Gulsun ^a   Devins, Julie ^a   Tsyrkina, Yelena ^a   Stadtlander, Gregg ^a   Millham, Eric ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN; LOGIC DEVICES; PROGRAM COMPILERS;

FPGA ARCHITECTURES; FRONT-END TOOLS; MACRO DESIGN; OPTIMUM DESIGNS; PHYSICAL DESIGN; PLACE AND ROUTE; ROUTING DELAY; VHDL SIMULATION;

LOGIC SYNTHESIS;

EID: 0344045494     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-61730-2_33     Document Type: Conference Paper

References (2)

1. Scott Gould, Brian Worth, Kim Clinton, Eric Millham, Fran Keyser, Ron Palmer, Steve Hartman, Terry Zittritsch, "An SRAM-Based FPGA Architecture, " Proceedings of the IEEE 1996 Custom Integrated Circuits Conference, May 1996
2. Electronic Design Interchange Format-A division of Electronic Industries Association, Library of Parameterized Modules (LPM) Version 2. 0, 1993.