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Volumn 1, Issue , 2003, Pages 388-389

Theoretical and experimental investigation of a balanced phase-locked loop based clock recovery at a bit rate of 160 Gb/s

Author keywords

[No Author keywords available]

Indexed keywords

LIGHT MODULATORS; LIGHT TRANSMISSION; MATHEMATICAL MODELS; PHASE COMPARATORS; TELECOMMUNICATION NETWORKS; TIME DIVISION MULTIPLEXING;

EID: 0344033929     PISSN: 10928081     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (1)

References (4)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.