A network switch using optical interconnection for high performance parallel computing using PCs: High-density implementation of high-speed signals for a one-chip electronic switch with optical interconnections

Proceedings - 6th International Conference on Parallel Interconnects, PI 1999

Volumn , Issue , 1999, Pages 5-12

  Nishimura, Shinji ^a   Kudoh, Tomohiro ^b   Nishi, Hiroaki ^b   Harasawa, Katsuyoshi ^a   Matsudaira, Nobuhiro ^a   Akutsu, Shigeto ^a   Tasyo, Koji ^c   Amano, Hideharu ^d  

^a HITACHI LTD   (Japan)

^b Tsukuba Research Cent   (Japan)

^c Synergetech Inc   (Japan)

^d KEIO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DISTRIBUTED COMPUTER SYSTEMS; ELECTRIC SWITCHES; HIGH SPEED NETWORKS; INTERCONNECTION NETWORKS (CIRCUIT SWITCHING); OPTICAL INTERCONNECTS; STATIC RANDOM ACCESS STORAGE;

CIRCUIT BOARDS; DISTRIBUTED PARALLEL COMPUTING; ELECTRICAL PROBLEMS; HIGH PERFORMANCE PARALLEL COMPUTING; HIGH-SPEED SIGNALS; LOW-LATENCY NETWORKS; NETWORK SWITCHES; OPTICAL INTERCONNECTION MODULE;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 0342344008     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PI.1999.806389     Document Type: Conference Paper

References (10)

1. S. Nishimura, H. Inoue, S. Hanatani, H. Matsuoka, and T. Yokota, "Synchronized parallel optical interconnection for the massively parallel computer RWC-1 (Invited)", Technical Digest of OC'98, pp. 536-540, Brugge, Belgium, 1998.
2. S. Nishimura, H. Inoue, H. Matsuoka, and T. Yokota, "Optical inte rconnection subsystem used in the RWC-1 massively parallel computer", will be published in the IEEE Journal of selected topics on quantum electronics, 1999.
3. A. Takai, T. Kato, S. Yamashita, S. Hanatani, Y. Motegi, K. Ito, H. Abe, and H. Kodera, "200-Mb/s/ch 100 m Optical Subsystem Interconnections Using 8-Channel 1.3-m Laser Diode Arrays and Single-Mode Fiber Arrays", J . of Lightwave Technology, vol. 12, pp. 260-270, 1994.
4. J. W. Goodman F. I. Leonberger, Sun-Yuan Athale, R. A. Kung, "Optical interconnects for VLSI system", Proceedings of the IEEE, vol. 72, pp. 159-174, July 1984.
5. D. A. B. Miller, H. W. Ozaktas, "Limit to the Bit-rate Capacity of Electrical Interconnection from the Aspect Ratio of the System Architecture", Journal of Parallel and Distributed Computing, vol. 41, pp. 42-52, 1997.
6. L.M. Ni, "Should Scalable Parallel Computers Support Efficient Hardware Multicast",Proc. of 1995 Int'l Conf. on Parallel ProcessingWorkshop on Challenges for Parallel Processing, August 1995, pp.2-7
7. T.Horie, H.Ishihara, T.Shimizu and M.Ikesaka, "AP1000 Architecture and Performance of LU Decomposition", Proc. of 1991 Int'l Conf. on Parallel Processing, August 1991, pp.634-635
8. HIPPI-6400 working drafts, T11.1 maintenance drafts of ANSI NCITS
9. IEEE802.3 Higher Speed Study Group http://grouper.ieee.org/groups/802/3/10G study/public/index.html
10. S. Nishimura, K. Harasawa, N. Matsudaira, S. Akutsu, S. Sasaki, T. Kudoh, "Large-throughput optical interconnection for a distributed parallel computing system", CLEO Pacific Rim '99, FE4, Seoul Korea, 1999.