Phase-locked loop for microprocessor with reduced complexity voltage controlled oscillator suitable for inverters

PEDES 1998 - 1998 International Conference on Power Electronic Drives and Energy Systems for Industrial Growth

Volumn 1, Issue , 1998, Pages 464-469

  Baker, D M ^a   Agelidis, V G ^a  

^a CURTIN UNIVERSITY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT OSCILLATIONS; ELECTRIC INVERTERS; LOCKS (FASTENERS); OSCILLISTORS; PHASE LOCKED LOOPS; POWER ELECTRONICS; PULSE WIDTH MODULATION; VARIABLE FREQUENCY OSCILLATORS; VOLTAGE CONTROL;

ALL DIGITAL PHASE LOCKED LOOP; GRID CONNECTED INVERTERS; ITERATIVE ALGORITHM; ITERATIVE TECHNIQUE; PHASE DETECTION; REDUCED COMPLEXITY; SINUSOIDAL OUTPUT; TAYLOR SERIES EXPANSIONS;

ITERATIVE METHODS;

EID: 0242509277     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PEDES.1998.1330062     Document Type: Conference Paper

References (7)

1. Roland E Best, "Phase-Locked Loops Theory, Design, and Applications", McGraw-Hill ISBN 0-07-911386-9, 1993.
2. P V Brennan, "Phase-Locked Loops: Principles and Practice", McGraw-Hill ISBN 0-07-007568-9, 1996.
3. Bar-Giora Goldberg, "Digital Techniques in Frequency Synthesis", McGraw-Hill ISBN 0-07-024166-X, 1996.
4. Fuminori Kobayashi, Masayuki Haratsu, Masateru Yabumoto and Michio Nakano, "Efficient Digital Techniques, for Implementing a Class of Fast Phase- Locked Loops (PLL's)", IEEE Transactions on Industrial Electronics, vol. 43, no. 6, pp 616-620, December 1996.
5. Guan-Chyun Hsieh and James C Hung, "Phase-Locked Loop Techniques-A Survey", IEEE Transactions on Industrial Electronics, vol. 43, no. 6, pp 609-615, December 1996.
6. Jim Dunning, Gerald Garcia, Jim Lundberg and Ed Nuckolls, "An All- Digital Phase-Locked Loop with 50-Cycle Lock Time Suitable for High-Performance Microprocessors", IEEE Journal of Solid- State Circuits, vol. 30, no. 4, pp 412-422, April 1995.
7. Ramon S. Co and J H Mulligan, "Optimization of Phase-Locked Loop Performance in Data Recovery Systems", IEEE Journal of Solid-State Circuits, vol. 29, no. 9, pp 1022-1034, September 1994.