Measurement of C and tan δ of a capacitor employing PSDs and dual-slope DVMs

IEEE Transactions on Instrumentation and Measurement

Volumn 52, Issue 5, 2003, Pages 1588-1592

  Kumar, V Jagadeesh ^a   Sankaran, P ^a   Rao, K Sudhakar ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; COMPUTER SIMULATION; DIGITAL VOLTMETERS; ELECTRIC CONDUCTANCE; ELECTRIC POTENTIAL; EQUIVALENT CIRCUITS; LOW PASS FILTERS; PARAMETER ESTIMATION; PHASE SHIFTERS; SCHEMATIC DIAGRAMS;

POWER DISSIPATION; THREE PHASE SENSITIVE DETECTORS;

CAPACITANCE MEASUREMENT;

EID: 0242468162     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2003.817919     Document Type: Article

References (10)

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