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Volumn , Issue , 2003, Pages 369-372

A substrate noise analysis methodology for large-scale mixed-signal ICs

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; NUMERICAL METHODS; SENSITIVITY ANALYSIS; SILICON; SPURIOUS SIGNAL NOISE; SUBSTRATES;

EID: 0242443713     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (15)

References (8)
  • 1
    • 0028384192 scopus 로고
    • Addressing substrate coupling in mixed-mode ICs: Simulation and power distribution synthesis
    • Mar.
    • Stanistic, B.R., et al., "Addressing substrate coupling in mixed-mode ICs: Simulation and power distribution synthesis," IEEE J. Solid State Circuits, vol. 29, no. 3, pp. 226-238, Mar. 1994.
    • (1994) IEEE J. Solid State Circuits , vol.29 , Issue.3 , pp. 226-238
    • Stanistic, B.R.1
  • 2
    • 0036051247 scopus 로고    scopus 로고
    • HSpeedEx: A high-speed extractor for substrate noise analysis in complex mixed-signal SOC
    • A. Koukab, C. Dehollain, and M. Declercq, "HSpeedEx: A High-Speed Extractor for Substrate Noise Analysis in Complex Mixed-Signal SOC," Proc. DAC 2002, pp. 767-771.
    • Proc. DAC 2002 , pp. 767-771
    • Koukab, A.1    Dehollain, C.2    Declercq, M.3
  • 3
    • 0035058164 scopus 로고    scopus 로고
    • Substrate noise generation in complex digital systems: Efficient modeling and simulation methodology and experimental verification
    • Feb.
    • van Heijningen, M., et al., "Substrate Noise Generation in Complex Digital Systems: Efficient Modeling and Simulation Methodology and Experimental Verification," ISSCC Digest of Technical papers, pp. 342-343, Feb. 2001.
    • (2001) ISSCC Digest of Technical Papers , pp. 342-343
    • Van Heijningen, M.1
  • 4
    • 0242508762 scopus 로고    scopus 로고
    • Nassda Corporation
    • HSIM User Guide, Nassda Corporation, 2003
    • (2003) HSIM User Guide
  • 5
    • 0242593437 scopus 로고    scopus 로고
    • Cadence Design Systems Inc.
    • SeismIC User's Guide, Cadence Design Systems Inc., 2003
    • (2003) SeismIC User's Guide
  • 6
    • 0035517255 scopus 로고    scopus 로고
    • Preventing a noisequake
    • Nov.
    • Ponnapalli, S., et al., "Preventing a Noisequake," IEEE Circuits and Devices, vol. 17, no. 6, pp. 19-28, Nov. 2001.
    • (2001) IEEE Circuits and Devices , vol.17 , Issue.6 , pp. 19-28
    • Ponnapalli, S.1
  • 7
    • 0033707515 scopus 로고    scopus 로고
    • Measurements and analyses of substrate noise waveform in mixed-signal IC environment
    • June
    • Nagata, M., et al., "Measurements and Analyses of Substrate Noise Waveform in Mixed-Signal IC Environment," IEEE Transactions on CAD, pp. 671-678, June 2000.
    • (2000) IEEE Transactions on CAD , pp. 671-678
    • Nagata, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.