High efficiency and latch-up free switched capacitor up converter on FD-SOI technology

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2002, Pages 288-291

  Kajiwara, Jun ^a   Kinoshita, Masayoshi ^a   Sakiyama, Shiro ^a   Matsuzawa, Akira ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CAPACITORS; ELECTRIC LOADS; ELECTRIC POTENTIAL; ENERGY CONVERSION; EQUIVALENT CIRCUITS; SILICON ON INSULATOR TECHNOLOGY; SWITCHING CIRCUITS;

LATCH-UP FREE SWITCHED CAPACITOR UP CONVERTER; POWER CONVERSION EFFICIENCY; SELF-POWER CONSUMPTION;

POWER CONVERTERS;

EID: 0242443355     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. E.C. Dijkmans and F.J. Sluijs, "DC/DC Conversion, the key to low power consumption," AACD '98 Conference, Copenhagen, April 1998.
2. Seung-Chul Lee and Seung-Hoon Lee, "A Low-Ripple Switched-Capacitor DC-DC Up Converter for Low-Voltage Applications," IEICE Trans. Electron., vol. E84-C, no.8, Aug. 2001.
3. Hiroki Sutoh and Kimihiro Yamakoshi, "A 0.25μm CMOS/SIMOX PLL Clock Generator Embedded in a Gate Array LSI with a Locking Range of 5 to 500MHz," IEICE, Trance. Electron., vol. E82-C, no. 7, July 1999.