Robust computer-aided parameter and tolerance determination for an electronic circuit design

International Journal of Production Research

Volumn 41, Issue 5, 2003, Pages 883-895

  Jeang, Angus ^a  

^a FENG CHIA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; ELECTRIC NETWORK ANALYSIS; OPTIMIZATION; QUALITY CONTROL;

RESPONSE SURFACE METHODOLOGY (RSM);

PRODUCTION ENGINEERING;

EID: 0242301572     PISSN: 00207543     EISSN: None     Source Type: Journal    
DOI: 10.1080/0020754021000033850     Document Type: Article

References (17)

1. BELAVENDRAM, N., 1995, Quality by Design (New York: Prentice Hall).
2. Box, G. E. and DRAPER, N. R., 1997, Empirical Model Building and Response Surface (New York: Wiley).
3. CHASE, K. W., GREENWOOD, W. H., LOOSLI, B. G. and HAUGLUND, L. F., 1990, Least cost tolerance allocation for mechanical assemblies with automated process selection. Manufacturing Review, 3(1), 49-59.
4. JEANG, A., 1995, Economic tolerance design for quality. Quality and Reliability Engineering International, 11(2), 113-121.
5. JEANG, A., 1996, Optimal tolerance design for product life cycle. International Journal of Production Research, 34(8), 2187-2209.
6. JEANG, A., 2001, Combined parameter and tolerance design optimization with quality and cost. International Journal of Production Research, 39(5), 923-952.
7. JOHNSON, D. E., HILBURN, J. L., JOHNSON, J. R. and SCOTT, P. D., 1995, Basic Electric Circuit Analysis, 5th edn (New York: Prentice Hall International).
8. KHURI, A. J. and CORNELL, J. A., 1996, Response Surface Methodology: Design and Analysis (New York: Marcel Dekker).
9. MADAHAV, S. P., 1989, Quality Engineering Using Robust Design (Englewood Cliffs, NJ: Prentice Hall).
10. MONTGOMERY, D. C., 1991, Design and Analysis of Experiments, 3rd edn (New York: Wiley).
11. MYERS, R. H. and MONTGOMERY, D. C., 1995, Response Surface Methodology, Process and Product Optimization Using Designed Experiments (New York: Wiley).
12. PSpice User's Guide, 2nd edn (Cadence PCB Systems Division, 13221 SW 68th Parkway, Suite 200, Portland, OR 97223, USA).
13. REMBOLD, U. and DILLMANN, R., 1986, Computer-aided Design and Manufacturing: Method and Tools (New York: Springer-Verlag).
14. SAS, 1988, SAS/STAT User's Guide, Release 6.03 Edition (Cary, NC: SAS Institute).
15. SPENCE, R. and SOIN, R. S., 1998, Tolerance Design of Electronic Circuits (New York: Addison-Wesley).
16. SPOTTS, M. F., 1973, Allocation of tolerances to minimize cost of assembly. Journal of Engineering for Industry, August, 762-764.
17. TAGUCHI, G., 1989, Introduction to Quality Engineering, Asian Productivity Organization (White Plains, New York: Unipub), pp. 21-22.