Human Body Model ESD Protection Concepts in SOI and Bulk CMOS at the 130nm Node

IEEE International SOI Conference

Volumn , Issue , 2003, Pages 23-25

  Putnam, C ^a   Gauthier, R ^a   Muhammad, M ^a   Chatty, K ^a   Woo, M ^b  

^a IBM   (United States)

^b OAO Services Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTROSTATICS; EQUIPMENT TESTING; MICROELECTRONICS; POLYSILICON; VOLTAGE MEASUREMENT;

ELECTROSTATIC DISCHARGES (ESD);

SILICON ON INSULATOR TECHNOLOGY;

EID: 0142248029     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/soi.2003.1242883     Document Type: Conference Paper

References (4)

1. Gauthier, et al, EOS/ESD Symposium, 2001.
2. L.K. Han, et al, VLSI Proc, 2000.
3. A.Amerasekera, C.Duvvury, "ESD in Silicon Integrated Circuits, " J. Wily & Sons, 1995.
4. N. Zamdmer, et al, VLSI Proc, 2001.